Masahiro Yamada | 5894ca0 | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011-2014 Panasonic Corporation |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <asm/io.h> |
Masahiro Yamada | a86ac95 | 2015-02-27 02:26:44 +0900 | [diff] [blame^] | 9 | #include <mach/sg-regs.h> |
Masahiro Yamada | 5894ca0 | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 10 | |
| 11 | void pin_init(void) |
| 12 | { |
| 13 | /* Comment format: PAD Name -> Function Name */ |
| 14 | |
| 15 | #ifdef CONFIG_UNIPHIER_SERIAL |
| 16 | sg_set_pinsel(70, 3); /* HDDOUT0 -> TXD0 */ |
| 17 | sg_set_pinsel(71, 3); /* HSDOUT1 -> RXD0 */ |
| 18 | |
| 19 | sg_set_pinsel(114, 0); /* TXD1 -> TXD1 */ |
| 20 | sg_set_pinsel(115, 0); /* RXD1 -> RXD1 */ |
| 21 | |
| 22 | sg_set_pinsel(112, 1); /* SBO1 -> TXD2 */ |
| 23 | sg_set_pinsel(113, 1); /* SBI1 -> RXD2 */ |
| 24 | |
| 25 | sg_set_pinsel(110, 1); /* SBO0 -> TXD3 */ |
| 26 | sg_set_pinsel(111, 1); /* SBI0 -> RXD3 */ |
| 27 | #endif |
| 28 | |
Masahiro Yamada | ee47064 | 2015-02-05 14:43:00 +0900 | [diff] [blame] | 29 | #ifdef CONFIG_SYS_I2C_UNIPHIER |
| 30 | { |
| 31 | u32 tmp; |
| 32 | tmp = readl(SG_IECTRL); |
| 33 | tmp |= 0xc00; /* enable SCL0, SDA0, SCL1, SDA1 */ |
| 34 | writel(tmp, SG_IECTRL); |
| 35 | } |
| 36 | #endif |
| 37 | |
Masahiro Yamada | 5894ca0 | 2014-10-03 19:21:06 +0900 | [diff] [blame] | 38 | #ifdef CONFIG_NAND_DENALI |
| 39 | sg_set_pinsel(15, 0); /* XNFRE_GB -> XNFRE_GB */ |
| 40 | sg_set_pinsel(16, 0); /* XNFWE_GB -> XNFWE_GB */ |
| 41 | sg_set_pinsel(17, 0); /* XFALE_GB -> NFALE_GB */ |
| 42 | sg_set_pinsel(18, 0); /* XFCLE_GB -> NFCLE_GB */ |
| 43 | sg_set_pinsel(19, 0); /* XNFWP_GB -> XFNWP_GB */ |
| 44 | sg_set_pinsel(20, 0); /* XNFCE0_GB -> XNFCE0_GB */ |
| 45 | sg_set_pinsel(21, 0); /* NANDRYBY0_GB -> NANDRYBY0_GB */ |
| 46 | sg_set_pinsel(22, 0); /* XFNCE1_GB -> XFNCE1_GB */ |
| 47 | sg_set_pinsel(23, 0); /* NANDRYBY1_GB -> NANDRYBY1_GB */ |
| 48 | sg_set_pinsel(24, 0); /* NFD0_GB -> NFD0_GB */ |
| 49 | sg_set_pinsel(25, 0); /* NFD1_GB -> NFD1_GB */ |
| 50 | sg_set_pinsel(26, 0); /* NFD2_GB -> NFD2_GB */ |
| 51 | sg_set_pinsel(27, 0); /* NFD3_GB -> NFD3_GB */ |
| 52 | sg_set_pinsel(28, 0); /* NFD4_GB -> NFD4_GB */ |
| 53 | sg_set_pinsel(29, 0); /* NFD5_GB -> NFD5_GB */ |
| 54 | sg_set_pinsel(30, 0); /* NFD6_GB -> NFD6_GB */ |
| 55 | sg_set_pinsel(31, 0); /* NFD7_GB -> NFD7_GB */ |
| 56 | #endif |
| 57 | |
| 58 | #ifdef CONFIG_USB_EHCI_UNIPHIER |
| 59 | sg_set_pinsel(41, 0); /* USB0VBUS -> USB0VBUS */ |
| 60 | sg_set_pinsel(42, 0); /* USB0OD -> USB0OD */ |
| 61 | sg_set_pinsel(43, 0); /* USB1VBUS -> USB1VBUS */ |
| 62 | sg_set_pinsel(44, 0); /* USB1OD -> USB1OD */ |
| 63 | /* sg_set_pinsel(114, 4); */ /* TXD1 -> USB2VBUS (shared with UART) */ |
| 64 | /* sg_set_pinsel(115, 4); */ /* RXD1 -> USB2OD */ |
| 65 | #endif |
| 66 | } |