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Bo Shenf7fa2f32012-07-05 17:21:46 +00001/*
2 * Copyright (C) 2012 Atmel Corporation
3 *
4 * Configuation settings for the AT91SAM9X5EK board.
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Bo Shenf7fa2f32012-07-05 17:21:46 +00007 */
8
9#ifndef __CONFIG_H__
10#define __CONFIG_H__
11
12#include <asm/hardware.h>
13
Bo Shen77461a62013-08-13 14:50:49 +080014#define CONFIG_SYS_TEXT_BASE 0x26f00000
15
Bo Shenf7fa2f32012-07-05 17:21:46 +000016/* ARM asynchronous clock */
17#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
18#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
Bo Shenf7fa2f32012-07-05 17:21:46 +000019
20#define CONFIG_AT91SAM9X5EK
Bo Shenf7fa2f32012-07-05 17:21:46 +000021
Bo Shenf7fa2f32012-07-05 17:21:46 +000022#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
23#define CONFIG_SETUP_MEMORY_TAGS
24#define CONFIG_INITRD_TAG
25#define CONFIG_SKIP_LOWLEVEL_INIT
26#define CONFIG_BOARD_EARLY_INIT_F
Bo Shenf7fa2f32012-07-05 17:21:46 +000027
28/* general purpose I/O */
29#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
30#define CONFIG_AT91_GPIO
31
32/* serial console */
33#define CONFIG_ATMEL_USART
34#define CONFIG_USART_BASE ATMEL_BASE_DBGU
35#define CONFIG_USART_ID ATMEL_ID_SYS
36
37/* LCD */
Bo Shenf7fa2f32012-07-05 17:21:46 +000038#define LCD_BPP LCD_COLOR16
39#define LCD_OUTPUT_BPP 24
40#define CONFIG_LCD_LOGO
Bo Shenf7fa2f32012-07-05 17:21:46 +000041#define CONFIG_LCD_INFO
42#define CONFIG_LCD_INFO_BELOW_LOGO
43#define CONFIG_SYS_WHITE_ON_BLACK
44#define CONFIG_ATMEL_HLCD
45#define CONFIG_ATMEL_LCD_RGB565
Bo Shenf7fa2f32012-07-05 17:21:46 +000046
Bo Shenf7fa2f32012-07-05 17:21:46 +000047
48/*
49 * BOOTP options
50 */
51#define CONFIG_BOOTP_BOOTFILESIZE
52#define CONFIG_BOOTP_BOOTPATH
53#define CONFIG_BOOTP_GATEWAY
54#define CONFIG_BOOTP_HOSTNAME
55
Bo Shend51a2a22013-12-10 16:14:02 +080056/* no NOR flash */
57#define CONFIG_SYS_NO_FLASH
58
Bo Shenf7fa2f32012-07-05 17:21:46 +000059/*
60 * Command line configuration.
61 */
Bo Shenf7fa2f32012-07-05 17:21:46 +000062#define CONFIG_CMD_NAND
Richard Genoudb030e732012-11-29 23:18:34 +000063
64/*
65 * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
66 * NB: in this case, USB 1.1 devices won't be recognized.
67 */
68
Bo Shenf7fa2f32012-07-05 17:21:46 +000069/* SDRAM */
70#define CONFIG_NR_DRAM_BANKS 1
71#define CONFIG_SYS_SDRAM_BASE 0x20000000
72#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
73
74#define CONFIG_SYS_INIT_SP_ADDR \
75 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
76
77/* DataFlash */
Bo Shen1d7442e2012-08-19 20:32:24 +000078#ifdef CONFIG_CMD_SF
79#define CONFIG_ATMEL_SPI
Bo Shen1d7442e2012-08-19 20:32:24 +000080#define CONFIG_SF_DEFAULT_SPEED 30000000
Bo Shenf7fa2f32012-07-05 17:21:46 +000081#endif
82
Bo Shenf7fa2f32012-07-05 17:21:46 +000083/* NAND flash */
84#ifdef CONFIG_CMD_NAND
85#define CONFIG_NAND_ATMEL
86#define CONFIG_SYS_MAX_NAND_DEVICE 1
87#define CONFIG_SYS_NAND_BASE 0x40000000
88#define CONFIG_SYS_NAND_DBW_8 1
89/* our ALE is AD21 */
90#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
91/* our CLE is AD22 */
92#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
93#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
94#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
95
Wu, Joshdf953212012-08-23 00:05:38 +000096/* PMECC & PMERRLOC */
97#define CONFIG_ATMEL_NAND_HWECC 1
98#define CONFIG_ATMEL_NAND_HW_PMECC 1
99#define CONFIG_PMECC_CAP 2
100#define CONFIG_PMECC_SECTOR_SIZE 512
Wu, Joshdf953212012-08-23 00:05:38 +0000101
Bo Shence76f0a2013-06-26 10:48:53 +0800102#define CONFIG_CMD_NAND_TRIMFFS
103
Bo Shenf7fa2f32012-07-05 17:21:46 +0000104#define CONFIG_MTD_DEVICE
105#define CONFIG_CMD_MTDPARTS
106#define CONFIG_MTD_PARTITIONS
107#define CONFIG_RBTREE
108#define CONFIG_LZO
Bo Shenf7fa2f32012-07-05 17:21:46 +0000109#define CONFIG_CMD_UBIFS
110#endif
111
Wu, Josh3a49cd72012-09-13 22:22:05 +0000112/* MMC */
113#ifdef CONFIG_CMD_MMC
114#define CONFIG_MMC
Wu, Josh3a49cd72012-09-13 22:22:05 +0000115#define CONFIG_GENERIC_MMC
116#define CONFIG_GENERIC_ATMEL_MCI
Richard Genoud419fba02012-11-29 23:18:33 +0000117#endif
118
119/* FAT */
120#ifdef CONFIG_CMD_FAT
Wu, Josh3a49cd72012-09-13 22:22:05 +0000121#define CONFIG_DOS_PARTITION
122#endif
123
Bo Shenf7fa2f32012-07-05 17:21:46 +0000124/* Ethernet */
125#define CONFIG_MACB
126#define CONFIG_RMII
127#define CONFIG_NET_RETRY_COUNT 20
128#define CONFIG_MACB_SEARCH_PHY
129
Richard Genoudb030e732012-11-29 23:18:34 +0000130/* USB */
131#ifdef CONFIG_CMD_USB
132#ifdef CONFIG_USB_EHCI
133#define CONFIG_USB_EHCI_ATMEL
134#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
135#else
Bo Shendcd2f1a2013-10-21 16:14:00 +0800136#define CONFIG_USB_ATMEL
137#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
Richard Genoudb030e732012-11-29 23:18:34 +0000138#define CONFIG_USB_OHCI_NEW
139#define CONFIG_SYS_USB_OHCI_CPU_INIT
140#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
141#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5"
142#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
143#endif
Richard Genoudb030e732012-11-29 23:18:34 +0000144#endif
145
Bo Shenf7fa2f32012-07-05 17:21:46 +0000146#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
147
148#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
149#define CONFIG_SYS_MEMTEST_END 0x26e00000
150
151#ifdef CONFIG_SYS_USE_NANDFLASH
152/* bootstrap + u-boot + env + linux in nandflash */
153#define CONFIG_ENV_IS_IN_NAND
154#define CONFIG_ENV_OFFSET 0xc0000
155#define CONFIG_ENV_OFFSET_REDUND 0x100000
156#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
157#define CONFIG_BOOTCOMMAND "nand read " \
158 "0x22000000 0x200000 0x300000; " \
159 "bootm 0x22000000"
Wu, Joshb7e31292012-11-02 00:17:27 +0000160#elif defined(CONFIG_SYS_USE_SPIFLASH)
Bo Shen1d7442e2012-08-19 20:32:24 +0000161/* bootstrap + u-boot + env + linux in spi flash */
162#define CONFIG_ENV_IS_IN_SPI_FLASH
163#define CONFIG_ENV_OFFSET 0x5000
164#define CONFIG_ENV_SIZE 0x3000
165#define CONFIG_ENV_SECT_SIZE 0x1000
166#define CONFIG_ENV_SPI_MAX_HZ 30000000
167#define CONFIG_BOOTCOMMAND "sf probe 0; " \
168 "sf read 0x22000000 0x100000 0x300000; " \
169 "bootm 0x22000000"
Bo Shen961ffc72012-12-06 21:37:04 +0000170#elif defined(CONFIG_SYS_USE_DATAFLASH)
171/* bootstrap + u-boot + env + linux in data flash */
172#define CONFIG_ENV_IS_IN_SPI_FLASH
173#define CONFIG_ENV_OFFSET 0x4200
174#define CONFIG_ENV_SIZE 0x4200
175#define CONFIG_ENV_SECT_SIZE 0x210
176#define CONFIG_ENV_SPI_MAX_HZ 30000000
177#define CONFIG_BOOTCOMMAND "sf probe 0; " \
178 "sf read 0x22000000 0x84000 0x294000; " \
179 "bootm 0x22000000"
Wu, Joshb7e31292012-11-02 00:17:27 +0000180#else /* CONFIG_SYS_USE_MMC */
181/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh26961772015-01-20 10:33:33 +0800182#define CONFIG_ENV_IS_IN_FAT
183#define CONFIG_FAT_WRITE
184#define FAT_ENV_INTERFACE "mmc"
185#define FAT_ENV_FILE "uboot.env"
186#define FAT_ENV_DEVICE_AND_PART "0"
187#define CONFIG_ENV_SIZE 0x4000
Bo Shenf7fa2f32012-07-05 17:21:46 +0000188#endif
189
Wu, Joshb7e31292012-11-02 00:17:27 +0000190#ifdef CONFIG_SYS_USE_MMC
191#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
192 "mtdparts=atmel_nand:" \
193 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
194 "root=/dev/mmcblk0p2 " \
195 "rw rootfstype=ext4 rootwait"
196#else
Bo Shen0c58cfa2013-02-20 00:16:25 +0000197#define CONFIG_BOOTARGS \
198 "console=ttyS0,115200 earlyprintk " \
199 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
200 "256k(env),256k(env_redundant),256k(spare)," \
201 "512k(dtb),6M(kernel)ro,-(rootfs) " \
202 "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
Wu, Joshb7e31292012-11-02 00:17:27 +0000203#endif
Bo Shenf7fa2f32012-07-05 17:21:46 +0000204
205#define CONFIG_BAUDRATE 115200
206
Bo Shenf7fa2f32012-07-05 17:21:46 +0000207#define CONFIG_SYS_CBSIZE 256
208#define CONFIG_SYS_MAXARGS 16
Bo Shenf7fa2f32012-07-05 17:21:46 +0000209#define CONFIG_SYS_LONGHELP
210#define CONFIG_CMDLINE_EDITING
211#define CONFIG_AUTO_COMPLETE
Bo Shenf7fa2f32012-07-05 17:21:46 +0000212
213/*
214 * Size of malloc() pool
215 */
216#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
217
Bo Shend85e8912015-03-27 14:23:35 +0800218/* SPL */
219#define CONFIG_SPL_FRAMEWORK
220#define CONFIG_SPL_TEXT_BASE 0x300000
221#define CONFIG_SPL_MAX_SIZE 0x6000
222#define CONFIG_SPL_STACK 0x308000
223
224#define CONFIG_SPL_BSS_START_ADDR 0x20000000
225#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
226#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
227#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
228
Bo Shend85e8912015-03-27 14:23:35 +0800229#define CONFIG_SPL_BOARD_INIT
230#define CONFIG_SYS_MONITOR_LEN (512 << 10)
231
232#define CONFIG_SYS_MASTER_CLOCK 132096000
233#define CONFIG_SYS_AT91_PLLA 0x20c73f03
234#define CONFIG_SYS_MCKR 0x1301
235#define CONFIG_SYS_MCKR_CSS 0x1302
236
Bo Shend85e8912015-03-27 14:23:35 +0800237#ifdef CONFIG_SYS_USE_MMC
238#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
Bo Shend85e8912015-03-27 14:23:35 +0800239#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
240#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
241#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
242#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shend85e8912015-03-27 14:23:35 +0800243
244#elif CONFIG_SYS_USE_NANDFLASH
Bo Shend85e8912015-03-27 14:23:35 +0800245#define CONFIG_SPL_NAND_DRIVERS
246#define CONFIG_SPL_NAND_BASE
247#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
248#define CONFIG_SYS_NAND_5_ADDR_CYCLE
249#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
250#define CONFIG_SYS_NAND_PAGE_COUNT 64
251#define CONFIG_SYS_NAND_OOBSIZE 64
252#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
253#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
254#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
255
256#elif CONFIG_SYS_USE_SPIFLASH
Bo Shend85e8912015-03-27 14:23:35 +0800257#define CONFIG_SPL_SPI_LOAD
258#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
259
260#endif
261
Bo Shenf7fa2f32012-07-05 17:21:46 +0000262#endif