blob: 662d1735db0808fb418adbc266524ac58b00f698 [file] [log] [blame]
Ben Warren89973f82008-08-31 22:22:04 -07001/*
2 * (C) Copyright 2008
3 * Benjamin Warren, biggerbadderben@gmail.com
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Ben Warren89973f82008-08-31 22:22:04 -07006 */
7
8/*
9 * netdev.h - definitions an prototypes for network devices
10 */
11
12#ifndef _NETDEV_H_
13#define _NETDEV_H_
14
15/*
16 * Board and CPU-specific initialization functions
17 * board_eth_init() has highest priority. cpu_eth_init() only
18 * gets called if board_eth_init() isn't instantiated or fails.
19 * Return values:
20 * 0: success
21 * -1: failure
22 */
23
24int board_eth_init(bd_t *bis);
25int cpu_eth_init(bd_t *bis);
26
27/* Driver initialization prototypes */
Thomas Chouc960b132010-04-20 12:49:52 +080028int altera_tse_initialize(u8 dev_num, int mac_base,
Joachim Foersterb962ac72011-10-17 05:24:44 +000029 int sgdma_rx_base, int sgdma_tx_base,
30 u32 sgdma_desc_base, u32 sgdma_desc_size);
Jens Scharsigc041e9d2010-01-23 12:03:45 +010031int at91emac_register(bd_t *bis, unsigned long iobase);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020032int au1x00_enet_initialize(bd_t*);
33int ax88180_initialize(bd_t *bis);
Jiandong Zheng799e1252014-08-01 20:37:16 -070034int bcm_sf2_eth_register(bd_t *bis, u8 dev_num);
Ben Warren89973f82008-08-31 22:22:04 -070035int bfin_EMAC_initialize(bd_t *bis);
Rob Herringefdd7312011-12-15 11:15:49 +000036int calxedaxgmac_initialize(u32 id, ulong base_addr);
Ben Warrenb1c0eaa2009-08-25 13:09:37 -070037int cs8900_initialize(u8 dev_num, int base_addr);
Ben Warren84535872009-05-26 00:34:07 -070038int davinci_emac_initialize(void);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020039int dc21x4x_initialize(bd_t *bis);
Alexey Brodkin92a190a2014-01-22 20:54:06 +040040int designware_initialize(ulong base_addr, u32 interface);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020041int dm9000_initialize(bd_t *bis);
Ilya Yanok62cbc402009-02-09 18:45:28 +010042int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
Ben Warrenad3381c2008-08-31 10:44:19 -070043int e1000_initialize(bd_t *bis);
Ben Warren10efa022008-08-31 20:37:00 -070044int eepro100_initialize(bd_t *bis);
Reinhard Meyera61a8192010-09-12 16:23:49 +020045int enc28j60_initialize(unsigned int bus, unsigned int cs,
46 unsigned int max_hz, unsigned int mode);
Matthias Kaehlcke594d57d2010-01-31 17:39:49 +010047int ep93xx_eth_initialize(u8 dev_num, int base_addr);
Ben Warren164846e2008-08-31 10:15:26 -070048int eth_3com_initialize (bd_t * bis);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020049int ethoc_initialize(u8 dev_num, int base_addr);
Ben Warren3456a142008-10-22 23:20:29 -070050int fec_initialize (bd_t *bis);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020051int fecmxc_initialize(bd_t *bis);
Marek Vasut9e27e9d2011-09-16 01:13:47 +020052int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr);
Macpaul Linb3dbf4a52010-12-21 16:59:46 +080053int ftgmac100_initialize(bd_t *bits);
Po-Yu Chuang750326e2009-08-10 11:00:00 +080054int ftmac100_initialize(bd_t *bits);
Kuo-Jung Suc4775472013-05-07 14:33:31 +080055int ftmac110_initialize(bd_t *bits);
Ben Warren89973f82008-08-31 22:22:04 -070056int greth_initialize(bd_t *bis);
Ben Warren6aca1452008-08-31 10:13:34 -070057void gt6426x_eth_initialize(bd_t *bis);
Roberto Cerati45a16932013-04-24 10:46:17 +080058int ks8851_mll_initialize(u8 dev_num, int base_addr);
Nishanth Menonb7ad4102009-10-16 00:06:35 -050059int lan91c96_initialize(u8 dev_num, int base_addr);
Albert ARIBAUD \(3ADEV\)ac2916a2015-03-31 11:40:43 +020060int lpc32xx_eth_initialize(bd_t *bis);
Ben Warren89973f82008-08-31 22:22:04 -070061int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
62int mcdmafec_initialize(bd_t *bis);
63int mcffec_initialize(bd_t *bis);
Ben Warrena0aad082008-08-31 10:36:38 -070064int mpc512x_fec_initialize(bd_t *bis);
Ben Warrene1d74802008-08-31 10:39:12 -070065int mpc5xxx_fec_initialize(bd_t *bis);
Gary Jennejohnba705b52008-11-20 12:28:38 +010066int mpc82xx_scc_enet_initialize(bd_t *bis);
Albert Aribaudd44265a2010-07-12 22:24:28 +020067int mvgbe_initialize(bd_t *bis);
Stefan Roese19fc2ea2014-10-22 12:13:14 +020068int mvneta_initialize(bd_t *bis, int base_addr, int devnum, int phy_addr);
Ben Warrenb902b8d2008-08-31 10:07:16 -070069int natsemi_initialize(bd_t *bis);
Bernhard Kaindld0201692011-10-20 10:56:59 +000070int ne2k_register(void);
Ben Warrencc940742008-09-05 01:55:22 -040071int npe_initialize(bd_t *bis);
Ben Warren19403632008-08-31 10:03:22 -070072int ns8382x_initialize(bd_t *bis);
Bin Meng8ee443b2015-03-20 17:12:20 +080073int pch_gbe_register(bd_t *bis);
Ben Warrene3090532008-08-31 10:08:43 -070074int pcnet_initialize(bd_t *bis);
Ben Warren25a85902008-10-27 23:53:17 -070075int ppc_4xx_eth_initialize (bd_t *bis);
Ben Warren0b252f52008-08-31 21:41:08 -070076int rtl8139_initialize(bd_t *bis);
Ben Warren02d69892008-08-31 09:49:42 -070077int rtl8169_initialize(bd_t *bis);
Ben Warren9eb79bd2008-10-23 22:02:49 -070078int scc_initialize(bd_t *bis);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020079int sh_eth_initialize(bd_t *bis);
Ben Warren89973f82008-08-31 22:22:04 -070080int skge_initialize(bd_t *bis);
Ben Warren7194ab82009-10-04 22:37:03 -070081int smc91111_initialize(u8 dev_num, int base_addr);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020082int smc911x_initialize(u8 dev_num, int base_addr);
Ben Warrenccdd12f2008-08-31 09:59:33 -070083int tsi108_eth_initialize(bd_t *bis);
Wolfgang Denk2b5243f2009-07-18 16:13:18 +020084int uec_standard_init(bd_t *bis);
Ben Warren89973f82008-08-31 22:22:04 -070085int uli526x_initialize(bd_t *bis);
Ajay Bhargav79788bb2011-09-13 22:21:58 +053086int armada100_fec_register(unsigned long base_addr);
Michal Simek4f1ec4c2011-10-06 20:35:35 +000087int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr,
88 unsigned long dma_addr);
Michal Simek0c9c99a2014-02-24 11:16:28 +010089int xilinx_emaclite_of_init(const void *blob);
Michal Simekc1044a12011-10-12 23:23:22 +000090int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
91 int txpp, int rxpp);
Stephan Linzdf482652012-02-25 00:48:31 +000092int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
93 unsigned long ctrl_addr);
Michal Simekf88a6862014-02-24 11:16:30 +010094int zynq_gem_of_init(const void *blob);
Michal Simek58405372015-01-14 15:44:21 +010095int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
96 int phy_addr, u32 emio);
Stephan Linzdf482652012-02-25 00:48:31 +000097/*
98 * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
99 * exported by a public hader file, we need a global definition at this point.
100 */
101#if defined(CONFIG_XILINX_LL_TEMAC)
102#define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */
103#define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */
104#define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */
105#endif
Ben Warren89973f82008-08-31 22:22:04 -0700106
107/* Boards with PCI network controllers can call this from their board_eth_init()
108 * function to initialize whatever's on board.
109 * Return value is total # of devices found */
110
111static inline int pci_eth_init(bd_t *bis)
112{
113 int num = 0;
Ben Warrene3090532008-08-31 10:08:43 -0700114
Ben Warren10efa022008-08-31 20:37:00 -0700115#ifdef CONFIG_PCI
116
117#ifdef CONFIG_EEPRO100
118 num += eepro100_initialize(bis);
119#endif
Ben Warren8ca0b3f2008-08-31 10:45:44 -0700120#ifdef CONFIG_TULIP
121 num += dc21x4x_initialize(bis);
122#endif
Ben Warrenad3381c2008-08-31 10:44:19 -0700123#ifdef CONFIG_E1000
124 num += e1000_initialize(bis);
125#endif
Bin Meng8ee443b2015-03-20 17:12:20 +0800126#ifdef CONFIG_PCH_GBE
127 num += pch_gbe_register(bis);
128#endif
Ben Warrene3090532008-08-31 10:08:43 -0700129#ifdef CONFIG_PCNET
130 num += pcnet_initialize(bis);
131#endif
Ben Warrenb902b8d2008-08-31 10:07:16 -0700132#ifdef CONFIG_NATSEMI
133 num += natsemi_initialize(bis);
134#endif
Ben Warren19403632008-08-31 10:03:22 -0700135#ifdef CONFIG_NS8382X
136 num += ns8382x_initialize(bis);
137#endif
Ben Warren0b252f52008-08-31 21:41:08 -0700138#if defined(CONFIG_RTL8139)
139 num += rtl8139_initialize(bis);
140#endif
Ben Warren02d69892008-08-31 09:49:42 -0700141#if defined(CONFIG_RTL8169)
142 num += rtl8169_initialize(bis);
143#endif
Timur Tabib11f6642009-04-09 10:27:05 -0500144#if defined(CONFIG_ULI526X)
Ben Warren89973f82008-08-31 22:22:04 -0700145 num += uli526x_initialize(bis);
146#endif
Ben Warren10efa022008-08-31 20:37:00 -0700147
148#endif /* CONFIG_PCI */
Ben Warren89973f82008-08-31 22:22:04 -0700149 return num;
150}
151
Prafulla Wadaskar6f51deb2009-05-19 01:40:16 +0530152/*
153 * Boards with mv88e61xx switch can use this by defining
154 * CONFIG_MV88E61XX_SWITCH in respective board configheader file
155 * the stuct and enums here are used to specify switch configuration params
156 */
157#if defined(CONFIG_MV88E61XX_SWITCH)
Albert ARIBAUD0a16ea52012-11-26 11:27:35 +0000158
159/* constants for any 88E61xx switch */
160#define MV88E61XX_MAX_PORTS_NUM 6
Prafulla Wadaskar6f51deb2009-05-19 01:40:16 +0530161
162enum mv88e61xx_cfg_mdip {
163 MV88E61XX_MDIP_NOCHANGE,
164 MV88E61XX_MDIP_REVERSE
165};
166
167enum mv88e61xx_cfg_ledinit {
168 MV88E61XX_LED_INIT_DIS,
169 MV88E61XX_LED_INIT_EN
170};
171
172enum mv88e61xx_cfg_rgmiid {
173 MV88E61XX_RGMII_DELAY_DIS,
174 MV88E61XX_RGMII_DELAY_EN
175};
176
177enum mv88e61xx_cfg_prtstt {
178 MV88E61XX_PORTSTT_DISABLED,
179 MV88E61XX_PORTSTT_BLOCKING,
180 MV88E61XX_PORTSTT_LEARNING,
181 MV88E61XX_PORTSTT_FORWARDING
182};
183
184struct mv88e61xx_config {
185 char *name;
Albert ARIBAUD0a16ea52012-11-26 11:27:35 +0000186 u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
Prafulla Wadaskar6f51deb2009-05-19 01:40:16 +0530187 enum mv88e61xx_cfg_rgmiid rgmii_delay;
188 enum mv88e61xx_cfg_prtstt portstate;
189 enum mv88e61xx_cfg_ledinit led_init;
190 enum mv88e61xx_cfg_mdip mdip;
191 u32 ports_enabled;
192 u8 cpuport;
193};
194
Albert ARIBAUD0a16ea52012-11-26 11:27:35 +0000195/*
196 * Common mappings for Internal VLANs
197 * These mappings consider that all ports are useable; the driver
198 * will mask inexistent/unused ports.
199 */
200
201/* Switch mode : routes any port to any port */
202#define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
203
204/* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
205#define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
206
Prafulla Wadaskar6f51deb2009-05-19 01:40:16 +0530207int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
208#endif /* CONFIG_MV88E61XX_SWITCH */
209
Troy Kiskyfe428b92012-10-22 16:40:46 +0000210struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id);
211#ifdef CONFIG_PHYLIB
212struct phy_device;
213int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
214 struct mii_dev *bus, struct phy_device *phydev);
215#else
Marek Vasut2e5f4422011-09-11 18:05:36 +0000216/*
217 * Allow FEC to fine-tune MII configuration on boards which require this.
218 */
219int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
Troy Kiskyfe428b92012-10-22 16:40:46 +0000220#endif
Marek Vasut2e5f4422011-09-11 18:05:36 +0000221
Ben Warren89973f82008-08-31 22:22:04 -0700222#endif /* _NETDEV_H_ */