blob: f57f9b21aba68bf9a318a73711041ed690ebe265 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese0299c902015-10-20 15:14:47 +02002/*
3 * Copyright (C) 2015 Stefan Roese <sr@denx.de>
Stefan Roese0299c902015-10-20 15:14:47 +02004 */
5
6#ifndef _CONFIG_CLEARFOG_H
7#define _CONFIG_CLEARFOG_H
8
9/*
10 * High Level Configuration Options (easy to change)
11 */
Stefan Roese0299c902015-10-20 15:14:47 +020012
Stefan Roese0299c902015-10-20 15:14:47 +020013/*
14 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
15 * for DDR ECC byte filling in the SPL before loading the main
16 * U-Boot into it.
17 */
Stefan Roese0299c902015-10-20 15:14:47 +020018#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
19
20/*
21 * Commands configuration
22 */
Stefan Roese0299c902015-10-20 15:14:47 +020023
24/* I2C */
25#define CONFIG_SYS_I2C
26#define CONFIG_SYS_I2C_MVTWSI
27#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
28#define CONFIG_SYS_I2C_SLAVE 0x0
29#define CONFIG_SYS_I2C_SPEED 100000
30
31/* SPI NOR flash default params, used by sf commands */
Jon Nettleton962b8fe2017-11-13 07:04:30 +020032#define CONFIG_SF_DEFAULT_BUS 1
Stefan Roese0299c902015-10-20 15:14:47 +020033
34/*
35 * SDIO/MMC Card Configuration
36 */
Stefan Roese0299c902015-10-20 15:14:47 +020037#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
38
Stefan Roese0299c902015-10-20 15:14:47 +020039/* USB/EHCI configuration */
40#define CONFIG_EHCI_IS_TDI
41
42#define CONFIG_ENV_MIN_ENTRIES 128
43
44/* Environment in MMC */
Stefan Roese0299c902015-10-20 15:14:47 +020045#define CONFIG_SYS_MMC_ENV_DEV 0
46#define CONFIG_ENV_SECT_SIZE 0x200
47#define CONFIG_ENV_SIZE 0x10000
48/*
49 * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC
50 * boot image starts @ LBA-0.
51 * As result in MMC/eMMC case it will be a 1 sector gap between u-boot
52 * image and environment
53 */
54#define CONFIG_ENV_OFFSET 0xf0000
55#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
56
Stefan Roese0299c902015-10-20 15:14:47 +020057#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
58
59/* PCIe support */
60#ifndef CONFIG_SPL_BUILD
Stefan Roese0299c902015-10-20 15:14:47 +020061#define CONFIG_PCI_MVEBU
Stefan Roese0299c902015-10-20 15:14:47 +020062#define CONFIG_PCI_SCAN_SHOW
63#endif
64
Stefan Roese0299c902015-10-20 15:14:47 +020065/* Keep device tree and initrd in lower memory so the kernel can access them */
Patrick Wildtf3d9ec22017-05-10 15:12:34 +020066#define RELOCATION_LIMITS_ENV_SETTINGS \
Stefan Roese0299c902015-10-20 15:14:47 +020067 "fdt_high=0x10000000\0" \
68 "initrd_high=0x10000000\0"
69
70/* SPL */
71/*
72 * Select the boot device here
73 *
74 * Currently supported are:
75 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
76 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
77 */
78#define SPL_BOOT_SPI_NOR_FLASH 1
79#define SPL_BOOT_SDIO_MMC_CARD 2
80#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SDIO_MMC_CARD
81
82/* Defines for SPL */
Stefan Roese0299c902015-10-20 15:14:47 +020083#define CONFIG_SPL_SIZE (140 << 10)
84#define CONFIG_SPL_TEXT_BASE 0x40000030
85#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
86
87#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
88#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
89
90#ifdef CONFIG_SPL_BUILD
91#define CONFIG_SYS_MALLOC_SIMPLE
92#endif
93
94#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
95#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
96
Stefan Roese0299c902015-10-20 15:14:47 +020097#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
98/* SPL related SPI defines */
Stefan Roese0299c902015-10-20 15:14:47 +020099#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
100#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
101#endif
102
103#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
104/* SPL related MMC defines */
Stefan Roese0299c902015-10-20 15:14:47 +0200105#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
106#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
Stefan Roese0299c902015-10-20 15:14:47 +0200107#ifdef CONFIG_SPL_BUILD
108#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
109#endif
110#endif
111
Stefan Roese0299c902015-10-20 15:14:47 +0200112/*
113 * mv-common.h should be defined after CMD configs since it used them
114 * to enable certain macros
115 */
116#include "mv-common.h"
117
Patrick Wildtf3d9ec22017-05-10 15:12:34 +0200118/* Include the common distro boot environment */
119#ifndef CONFIG_SPL_BUILD
Patrick Wildtf3d9ec22017-05-10 15:12:34 +0200120
121#ifdef CONFIG_MMC
122#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
123#else
124#define BOOT_TARGET_DEVICES_MMC(func)
125#endif
126
127#ifdef CONFIG_USB_STORAGE
128#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
129#else
130#define BOOT_TARGET_DEVICES_USB(func)
131#endif
132
133#define BOOT_TARGET_DEVICES(func) \
134 BOOT_TARGET_DEVICES_MMC(func) \
135 BOOT_TARGET_DEVICES_USB(func) \
136 func(PXE, pxe, na) \
137 func(DHCP, dhcp, na)
138
139#define KERNEL_ADDR_R __stringify(0x800000)
140#define FDT_ADDR_R __stringify(0x100000)
141#define RAMDISK_ADDR_R __stringify(0x1800000)
142#define SCRIPT_ADDR_R __stringify(0x200000)
143#define PXEFILE_ADDR_R __stringify(0x300000)
144
145#define LOAD_ADDRESS_ENV_SETTINGS \
146 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
147 "fdt_addr_r=" FDT_ADDR_R "\0" \
148 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
149 "scriptaddr=" SCRIPT_ADDR_R "\0" \
150 "pxefile_addr_r=" PXEFILE_ADDR_R "\0"
151
152#include <config_distro_bootcmd.h>
153
154#define CONFIG_EXTRA_ENV_SETTINGS \
155 RELOCATION_LIMITS_ENV_SETTINGS \
156 LOAD_ADDRESS_ENV_SETTINGS \
157 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
158 "console=ttyS0,115200\0" \
159 BOOTENV
160
161#endif /* CONFIG_SPL_BUILD */
162
Stefan Roese0299c902015-10-20 15:14:47 +0200163#endif /* _CONFIG_CLEARFOG_H */