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wdenk4f7cb082003-09-11 23:06:34 +00001/*
2 * Functions to access the TSC2000 controller on TRAB board (used for scanning
3 * thermo sensors)
4 *
5 * Copyright (C) 2003 Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
6 *
7 * Copyright (C) 2002 DENX Software Engineering, Wolfgang Denk, wd@denx.de
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#ifndef _TSC2000_H_
29#define _TSC2000_H_
30
wdenk4f7cb082003-09-11 23:06:34 +000031/* temperature channel multiplexer definitions */
32#define CON_MUX0 (gpio->PCCON = (gpio->PCCON & 0x0FFFFFCFF) | 0x00000100)
33#define CLR_MUX0 (gpio->PCDAT &= 0x0FFEF)
34#define SET_MUX0 (gpio->PCDAT |= 0x00010)
35
36#define CON_MUX1 (gpio->PCCON = (gpio->PCCON & 0x0FFFFF3FF) | 0x00000400)
37#define CLR_MUX1 (gpio->PCDAT &= 0x0FFDF)
38#define SET_MUX1 (gpio->PCDAT |= 0x00020)
39
40#define CON_MUX1_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFFCFFF) | 0x00001000)
41#define CLR_MUX1_ENABLE (gpio->PCDAT |= 0x00040)
42#define SET_MUX1_ENABLE (gpio->PCDAT &= 0x0FFBF)
43
44#define CON_MUX2_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFF3FFF) | 0x00004000)
45#define CLR_MUX2_ENABLE (gpio->PCDAT |= 0x00080)
46#define SET_MUX2_ENABLE (gpio->PCDAT &= 0x0FF7F)
47
48#define CON_MUX3_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFCFFFF) | 0x00010000)
49#define CLR_MUX3_ENABLE (gpio->PCDAT |= 0x00100)
50#define SET_MUX3_ENABLE (gpio->PCDAT &= 0x0FEFF)
51
52#define CON_MUX4_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFF3FFFF) | 0x00040000)
53#define CLR_MUX4_ENABLE (gpio->PCDAT |= 0x00200)
54#define SET_MUX4_ENABLE (gpio->PCDAT &= 0x0FDFF)
55
56#define CON_SEL_TEMP_V_0 (gpio->PCCON = (gpio->PCCON & 0x0FFCFFFFF) | 0x00100000)
57#define CLR_SEL_TEMP_V_0 (gpio->PCDAT &= 0x0FBFF)
58#define SET_SEL_TEMP_V_0 (gpio->PCDAT |= 0x00400)
59
60#define CON_SEL_TEMP_V_1 (gpio->PCCON = (gpio->PCCON & 0x0FF3FFFFF) | 0x00400000)
61#define CLR_SEL_TEMP_V_1 (gpio->PCDAT &= 0x0F7FF)
62#define SET_SEL_TEMP_V_1 (gpio->PCDAT |= 0x00800)
63
64#define CON_SEL_TEMP_V_2 (gpio->PCCON = (gpio->PCCON & 0x0FCFFFFFF) | 0x01000000)
65#define CLR_SEL_TEMP_V_2 (gpio->PCDAT &= 0x0EFFF)
66#define SET_SEL_TEMP_V_2 (gpio->PCDAT |= 0x01000)
67
68#define CON_SEL_TEMP_V_3 (gpio->PCCON = (gpio->PCCON & 0x0F3FFFFFF) | 0x04000000)
69#define CLR_SEL_TEMP_V_3 (gpio->PCDAT &= 0x0DFFF)
70#define SET_SEL_TEMP_V_3 (gpio->PCDAT |= 0x02000)
71
72/* TSC2000 register definition */
73#define TSC2000_REG_X ((0 << 11) | (0 << 5))
74#define TSC2000_REG_Y ((0 << 11) | (1 << 5))
75#define TSC2000_REG_Z1 ((0 << 11) | (2 << 5))
76#define TSC2000_REG_Z2 ((0 << 11) | (3 << 5))
77#define TSC2000_REG_BAT1 ((0 << 11) | (5 << 5))
78#define TSC2000_REG_BAT2 ((0 << 11) | (6 << 5))
79#define TSC2000_REG_AUX1 ((0 << 11) | (7 << 5))
80#define TSC2000_REG_AUX2 ((0 << 11) | (8 << 5))
81#define TSC2000_REG_TEMP1 ((0 << 11) | (9 << 5))
82#define TSC2000_REG_TEMP2 ((0 << 11) | (0xA << 5))
83#define TSC2000_REG_DAC ((0 << 11) | (0xB << 5))
84#define TSC2000_REG_ZERO ((0 << 11) | (0x10 << 5))
85#define TSC2000_REG_ADC ((1 << 11) | (0 << 5))
86#define TSC2000_REG_DACCTL ((1 << 11) | (2 << 5))
87#define TSC2000_REG_REF ((1 << 11) | (3 << 5))
88#define TSC2000_REG_RESET ((1 << 11) | (4 << 5))
89#define TSC2000_REG_CONFIG ((1 << 11) | (5 << 5))
90
91/* bit definition of TSC2000 ADC register */
92#define TC_PSM (1 << 15)
93#define TC_STS (1 << 14)
94#define TC_AD3 (1 << 13)
95#define TC_AD2 (1 << 12)
96#define TC_AD1 (1 << 11)
97#define TC_AD0 (1 << 10)
98#define TC_RS1 (1 << 9)
99#define TC_RS0 (1 << 8)
100#define TC_AV1 (1 << 7)
101#define TC_AV0 (1 << 6)
102#define TC_CL1 (1 << 5)
103#define TC_CL0 (1 << 4)
104#define TC_PV2 (1 << 3)
105#define TC_PV1 (1 << 2)
106#define TC_PV0 (1 << 1)
107
108/* default value for TSC2000 ADC register for use with touch functions */
109#define DEFAULT_ADC (TC_PV1 | TC_AV0 | TC_AV1 | TC_RS0)
110
111#define TSC2000_DELAY_BASE 500
112#define TSC2000_NO_SENSOR -0x10000
113
114#define ERROR_BATTERY 220 /* must be adjusted, if R68 is changed on
wdenk42d1f032003-10-15 23:53:47 +0000115 * TRAB */
wdenk4f7cb082003-09-11 23:06:34 +0000116
wdenkf5300ab2003-09-12 15:35:15 +0000117void tsc2000_write(unsigned short, unsigned short);
118unsigned short tsc2000_read (unsigned short);
119u16 tsc2000_read_channel (unsigned int);
120void tsc2000_set_mux (unsigned int);
121void tsc2000_set_range (unsigned int);
wdenk4f7cb082003-09-11 23:06:34 +0000122void tsc2000_reg_init (void);
123s32 tsc2000_contact_temp (void);
wdenkf5300ab2003-09-12 15:35:15 +0000124void spi_wait_transmit_done (void);
wdenk4f7cb082003-09-11 23:06:34 +0000125void spi_init(void);
wdenkf5300ab2003-09-12 15:35:15 +0000126int tsc2000_interpolate(long value, long data[][2], long *result);
127void adc_wait_conversion_done(void);
wdenk4f7cb082003-09-11 23:06:34 +0000128
129
130static inline void SET_CS_TOUCH(void)
131{
132 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
133
134 gpio->PDDAT &= 0x5FF;
135}
136
137
138static inline void CLR_CS_TOUCH(void)
139{
140 S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
141
142 gpio->PDDAT |= 0x200;
143}
144
145#endif /* _TSC2000_H_ */