Tim Harvey | acb9a13 | 2021-03-01 14:33:30 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2014 Gateworks Corporation |
| 3 | * |
| 4 | * This file is dual-licensed: you can use it either under the terms |
| 5 | * of the GPL or the X11 license, at your option. Note that this dual |
| 6 | * licensing only applies to this file, and not this project as a |
| 7 | * whole. |
| 8 | * |
| 9 | * a) This file is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This file is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public |
| 20 | * License along with this file; if not, write to the Free |
| 21 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, |
| 22 | * MA 02110-1301 USA |
| 23 | * |
| 24 | * Or, alternatively, |
| 25 | * |
| 26 | * b) Permission is hereby granted, free of charge, to any person |
| 27 | * obtaining a copy of this software and associated documentation |
| 28 | * files (the "Software"), to deal in the Software without |
| 29 | * restriction, including without limitation the rights to use, |
| 30 | * copy, modify, merge, publish, distribute, sublicense, and/or |
| 31 | * sell copies of the Software, and to permit persons to whom the |
| 32 | * Software is furnished to do so, subject to the following |
| 33 | * conditions: |
| 34 | * |
| 35 | * The above copyright notice and this permission notice shall be |
| 36 | * included in all copies or substantial portions of the Software. |
| 37 | * |
| 38 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 39 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
| 40 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 41 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
| 42 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
| 43 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 44 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 45 | * OTHER DEALINGS IN THE SOFTWARE. |
| 46 | */ |
| 47 | |
| 48 | #include <dt-bindings/gpio/gpio.h> |
| 49 | #include <dt-bindings/media/tda1997x.h> |
| 50 | #include <dt-bindings/input/linux-event-codes.h> |
| 51 | #include <dt-bindings/interrupt-controller/irq.h> |
| 52 | #include <dt-bindings/sound/fsl-imx-audmux.h> |
| 53 | |
| 54 | / { |
| 55 | /* these are used by bootloader for disabling nodes */ |
| 56 | aliases { |
| 57 | led0 = &led0; |
| 58 | nand = &gpmi; |
| 59 | ssi0 = &ssi1; |
Marcel Ziswiler | d0399a4 | 2022-07-21 15:27:26 +0200 | [diff] [blame] | 60 | usb0 = &usbh1; |
| 61 | usb1 = &usbotg; |
Tim Harvey | acb9a13 | 2021-03-01 14:33:30 -0800 | [diff] [blame] | 62 | }; |
| 63 | |
| 64 | chosen { |
| 65 | bootargs = "console=ttymxc1,115200"; |
| 66 | }; |
| 67 | |
| 68 | gpio-keys { |
| 69 | compatible = "gpio-keys"; |
Tim Harvey | acb9a13 | 2021-03-01 14:33:30 -0800 | [diff] [blame] | 70 | |
| 71 | user-pb { |
| 72 | label = "user_pb"; |
| 73 | gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; |
| 74 | linux,code = <BTN_0>; |
| 75 | }; |
| 76 | |
| 77 | user-pb1x { |
| 78 | label = "user_pb1x"; |
| 79 | linux,code = <BTN_1>; |
| 80 | interrupt-parent = <&gsc>; |
| 81 | interrupts = <0>; |
| 82 | }; |
| 83 | |
| 84 | key-erased { |
| 85 | label = "key-erased"; |
| 86 | linux,code = <BTN_2>; |
| 87 | interrupt-parent = <&gsc>; |
| 88 | interrupts = <1>; |
| 89 | }; |
| 90 | |
| 91 | eeprom-wp { |
| 92 | label = "eeprom_wp"; |
| 93 | linux,code = <BTN_3>; |
| 94 | interrupt-parent = <&gsc>; |
| 95 | interrupts = <2>; |
| 96 | }; |
| 97 | |
| 98 | tamper { |
| 99 | label = "tamper"; |
| 100 | linux,code = <BTN_4>; |
| 101 | interrupt-parent = <&gsc>; |
| 102 | interrupts = <5>; |
| 103 | }; |
| 104 | |
| 105 | switch-hold { |
| 106 | label = "switch_hold"; |
| 107 | linux,code = <BTN_5>; |
| 108 | interrupt-parent = <&gsc>; |
| 109 | interrupts = <7>; |
| 110 | }; |
| 111 | }; |
| 112 | |
| 113 | leds { |
| 114 | compatible = "gpio-leds"; |
| 115 | pinctrl-names = "default"; |
| 116 | pinctrl-0 = <&pinctrl_gpio_leds>; |
| 117 | |
| 118 | led0: user1 { |
| 119 | label = "user1"; |
| 120 | gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; |
| 121 | default-state = "on"; |
| 122 | linux,default-trigger = "heartbeat"; |
| 123 | }; |
| 124 | }; |
| 125 | |
| 126 | memory@10000000 { |
| 127 | device_type = "memory"; |
| 128 | reg = <0x10000000 0x20000000>; |
| 129 | }; |
| 130 | |
| 131 | reg_5p0v: regulator-5p0v { |
| 132 | compatible = "regulator-fixed"; |
| 133 | regulator-name = "5P0V"; |
| 134 | regulator-min-microvolt = <5000000>; |
| 135 | regulator-max-microvolt = <5000000>; |
| 136 | }; |
| 137 | |
| 138 | reg_usb_h1_vbus: regulator-usb-h1-vbus { |
| 139 | compatible = "regulator-fixed"; |
| 140 | regulator-name = "usb_h1_vbus"; |
| 141 | regulator-min-microvolt = <5000000>; |
| 142 | regulator-max-microvolt = <5000000>; |
| 143 | }; |
| 144 | |
| 145 | reg_usb_otg_vbus: regulator-usb-otg-vbus { |
| 146 | compatible = "regulator-fixed"; |
| 147 | regulator-name = "usb_otg_vbus"; |
| 148 | regulator-min-microvolt = <5000000>; |
| 149 | regulator-max-microvolt = <5000000>; |
| 150 | }; |
| 151 | |
| 152 | sound-digital { |
| 153 | compatible = "simple-audio-card"; |
| 154 | simple-audio-card,name = "tda1997x-audio"; |
| 155 | simple-audio-card,format = "i2s"; |
| 156 | simple-audio-card,bitclock-master = <&sound_codec>; |
| 157 | simple-audio-card,frame-master = <&sound_codec>; |
| 158 | |
| 159 | sound_cpu: simple-audio-card,cpu { |
| 160 | sound-dai = <&ssi1>; |
| 161 | }; |
| 162 | |
| 163 | sound_codec: simple-audio-card,codec { |
| 164 | sound-dai = <&hdmi_receiver>; |
| 165 | }; |
| 166 | }; |
| 167 | }; |
| 168 | |
| 169 | &audmux { |
| 170 | pinctrl-names = "default"; |
| 171 | pinctrl-0 = <&pinctrl_audmux>; /* AUD5<->tda1997x */ |
| 172 | status = "okay"; |
| 173 | |
| 174 | ssi1 { |
| 175 | fsl,audmux-port = <0>; |
| 176 | fsl,port-config = < |
| 177 | (IMX_AUDMUX_V2_PTCR_TFSDIR | |
| 178 | IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */ |
| 179 | IMX_AUDMUX_V2_PTCR_TCLKDIR | |
| 180 | IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */ |
| 181 | IMX_AUDMUX_V2_PTCR_SYN) |
| 182 | IMX_AUDMUX_V2_PDCR_RXDSEL(4) |
| 183 | >; |
| 184 | }; |
| 185 | |
| 186 | aud5 { |
| 187 | fsl,audmux-port = <4>; |
| 188 | fsl,port-config = < |
| 189 | IMX_AUDMUX_V2_PTCR_SYN |
| 190 | IMX_AUDMUX_V2_PDCR_RXDSEL(0)>; |
| 191 | }; |
| 192 | }; |
| 193 | |
| 194 | &can1 { |
| 195 | pinctrl-names = "default"; |
| 196 | pinctrl-0 = <&pinctrl_flexcan1>; |
| 197 | status = "okay"; |
| 198 | }; |
| 199 | |
| 200 | &gpmi { |
| 201 | pinctrl-names = "default"; |
| 202 | pinctrl-0 = <&pinctrl_gpmi_nand>; |
| 203 | status = "okay"; |
| 204 | }; |
| 205 | |
| 206 | &hdmi { |
| 207 | ddc-i2c-bus = <&i2c3>; |
| 208 | status = "okay"; |
| 209 | }; |
| 210 | |
| 211 | &i2c1 { |
| 212 | clock-frequency = <100000>; |
| 213 | pinctrl-names = "default"; |
| 214 | pinctrl-0 = <&pinctrl_i2c1>; |
| 215 | status = "okay"; |
| 216 | |
| 217 | gsc: gsc@20 { |
| 218 | compatible = "gw,gsc"; |
| 219 | reg = <0x20>; |
| 220 | interrupt-parent = <&gpio1>; |
| 221 | interrupts = <4 IRQ_TYPE_LEVEL_LOW>; |
| 222 | interrupt-controller; |
| 223 | #interrupt-cells = <1>; |
| 224 | #size-cells = <0>; |
| 225 | |
| 226 | adc { |
| 227 | compatible = "gw,gsc-adc"; |
| 228 | #address-cells = <1>; |
| 229 | #size-cells = <0>; |
| 230 | |
| 231 | channel@0 { |
| 232 | gw,mode = <0>; |
| 233 | reg = <0x00>; |
| 234 | label = "temp"; |
| 235 | }; |
| 236 | |
| 237 | channel@2 { |
| 238 | gw,mode = <1>; |
| 239 | reg = <0x02>; |
| 240 | label = "vdd_vin"; |
| 241 | }; |
| 242 | |
| 243 | channel@5 { |
| 244 | gw,mode = <1>; |
| 245 | reg = <0x05>; |
| 246 | label = "vdd_3p3"; |
| 247 | }; |
| 248 | |
| 249 | channel@8 { |
| 250 | gw,mode = <1>; |
| 251 | reg = <0x08>; |
| 252 | label = "vdd_bat"; |
| 253 | }; |
| 254 | |
| 255 | channel@b { |
| 256 | gw,mode = <1>; |
| 257 | reg = <0x0b>; |
| 258 | label = "vdd_5p0"; |
| 259 | }; |
| 260 | |
| 261 | channel@e { |
| 262 | gw,mode = <1>; |
| 263 | reg = <0xe>; |
| 264 | label = "vdd_arm"; |
| 265 | }; |
| 266 | |
| 267 | channel@11 { |
| 268 | gw,mode = <1>; |
| 269 | reg = <0x11>; |
| 270 | label = "vdd_soc"; |
| 271 | }; |
| 272 | |
| 273 | channel@14 { |
| 274 | gw,mode = <1>; |
| 275 | reg = <0x14>; |
| 276 | label = "vdd_3p0"; |
| 277 | }; |
| 278 | |
| 279 | channel@17 { |
| 280 | gw,mode = <1>; |
| 281 | reg = <0x17>; |
| 282 | label = "vdd_1p5"; |
| 283 | }; |
| 284 | |
| 285 | channel@1d { |
| 286 | gw,mode = <1>; |
| 287 | reg = <0x1d>; |
| 288 | label = "vdd_1p8a"; |
| 289 | }; |
| 290 | |
| 291 | channel@20 { |
| 292 | gw,mode = <1>; |
| 293 | reg = <0x20>; |
| 294 | label = "vdd_1p0b"; |
| 295 | }; |
| 296 | }; |
| 297 | }; |
| 298 | |
| 299 | gsc_gpio: gpio@23 { |
| 300 | compatible = "nxp,pca9555"; |
| 301 | reg = <0x23>; |
| 302 | gpio-controller; |
| 303 | #gpio-cells = <2>; |
| 304 | interrupt-parent = <&gsc>; |
| 305 | interrupts = <4>; |
| 306 | }; |
| 307 | |
| 308 | eeprom1: eeprom@50 { |
| 309 | compatible = "atmel,24c02"; |
| 310 | reg = <0x50>; |
| 311 | pagesize = <16>; |
| 312 | }; |
| 313 | |
| 314 | eeprom2: eeprom@51 { |
| 315 | compatible = "atmel,24c02"; |
| 316 | reg = <0x51>; |
| 317 | pagesize = <16>; |
| 318 | }; |
| 319 | |
| 320 | eeprom3: eeprom@52 { |
| 321 | compatible = "atmel,24c02"; |
| 322 | reg = <0x52>; |
| 323 | pagesize = <16>; |
| 324 | }; |
| 325 | |
| 326 | eeprom4: eeprom@53 { |
| 327 | compatible = "atmel,24c02"; |
| 328 | reg = <0x53>; |
| 329 | pagesize = <16>; |
| 330 | }; |
| 331 | |
| 332 | rtc: ds1672@68 { |
| 333 | compatible = "dallas,ds1672"; |
| 334 | reg = <0x68>; |
| 335 | }; |
| 336 | }; |
| 337 | |
| 338 | &i2c2 { |
| 339 | clock-frequency = <100000>; |
| 340 | pinctrl-names = "default"; |
| 341 | pinctrl-0 = <&pinctrl_i2c2>; |
| 342 | status = "okay"; |
| 343 | |
| 344 | ltc3676: pmic@3c { |
| 345 | compatible = "lltc,ltc3676"; |
| 346 | reg = <0x3c>; |
| 347 | pinctrl-names = "default"; |
| 348 | pinctrl-0 = <&pinctrl_pmic>; |
| 349 | interrupt-parent = <&gpio1>; |
| 350 | interrupts = <8 IRQ_TYPE_EDGE_FALLING>; |
| 351 | |
| 352 | regulators { |
| 353 | /* VDD_SOC (1+R1/R2 = 1.635) */ |
| 354 | reg_vdd_soc: sw1 { |
| 355 | regulator-name = "vddsoc"; |
| 356 | regulator-min-microvolt = <674400>; |
| 357 | regulator-max-microvolt = <1308000>; |
| 358 | lltc,fb-voltage-divider = <127000 200000>; |
| 359 | regulator-ramp-delay = <7000>; |
| 360 | regulator-boot-on; |
| 361 | regulator-always-on; |
| 362 | }; |
| 363 | |
| 364 | /* VDD_DDR (1+R1/R2 = 2.105) */ |
| 365 | reg_vdd_ddr: sw2 { |
| 366 | regulator-name = "vddddr"; |
| 367 | regulator-min-microvolt = <868310>; |
| 368 | regulator-max-microvolt = <1684000>; |
| 369 | lltc,fb-voltage-divider = <221000 200000>; |
| 370 | regulator-ramp-delay = <7000>; |
| 371 | regulator-boot-on; |
| 372 | regulator-always-on; |
| 373 | }; |
| 374 | |
| 375 | /* VDD_ARM (1+R1/R2 = 1.635) */ |
| 376 | reg_vdd_arm: sw3 { |
| 377 | regulator-name = "vddarm"; |
| 378 | regulator-min-microvolt = <674400>; |
| 379 | regulator-max-microvolt = <1308000>; |
| 380 | lltc,fb-voltage-divider = <127000 200000>; |
| 381 | regulator-ramp-delay = <7000>; |
| 382 | regulator-boot-on; |
| 383 | regulator-always-on; |
| 384 | }; |
| 385 | |
| 386 | /* VDD_3P3 (1+R1/R2 = 1.281) */ |
| 387 | reg_3p3: sw4 { |
| 388 | regulator-name = "vdd3p3"; |
| 389 | regulator-min-microvolt = <1880000>; |
| 390 | regulator-max-microvolt = <3647000>; |
| 391 | lltc,fb-voltage-divider = <200000 56200>; |
| 392 | regulator-ramp-delay = <7000>; |
| 393 | regulator-boot-on; |
| 394 | regulator-always-on; |
| 395 | }; |
| 396 | |
| 397 | /* VDD_1P8a (1+R1/R2 = 2.505): HDMI In core */ |
| 398 | reg_1p8a: ldo2 { |
| 399 | regulator-name = "vdd1p8a"; |
| 400 | regulator-min-microvolt = <1816125>; |
| 401 | regulator-max-microvolt = <1816125>; |
| 402 | lltc,fb-voltage-divider = <301000 200000>; |
| 403 | regulator-boot-on; |
| 404 | regulator-always-on; |
| 405 | }; |
| 406 | |
| 407 | /* VDD_1P8b: HDMI In analog */ |
| 408 | reg_1p8b: ldo3 { |
| 409 | regulator-name = "vdd1p8b"; |
| 410 | regulator-min-microvolt = <1800000>; |
| 411 | regulator-max-microvolt = <1800000>; |
| 412 | regulator-boot-on; |
| 413 | }; |
| 414 | |
| 415 | /* VDD_HIGH (1+R1/R2 = 4.17) */ |
| 416 | reg_3p0: ldo4 { |
| 417 | regulator-name = "vdd3p0"; |
| 418 | regulator-min-microvolt = <3023250>; |
| 419 | regulator-max-microvolt = <3023250>; |
| 420 | lltc,fb-voltage-divider = <634000 200000>; |
| 421 | regulator-boot-on; |
| 422 | regulator-always-on; |
| 423 | }; |
| 424 | }; |
| 425 | }; |
| 426 | }; |
| 427 | |
| 428 | &i2c3 { |
| 429 | clock-frequency = <100000>; |
| 430 | pinctrl-names = "default"; |
| 431 | pinctrl-0 = <&pinctrl_i2c3>; |
| 432 | status = "okay"; |
| 433 | |
| 434 | gpio_exp: pca9555@24 { |
| 435 | compatible = "nxp,pca9555"; |
| 436 | reg = <0x24>; |
| 437 | gpio-controller; |
| 438 | #gpio-cells = <2>; |
| 439 | }; |
| 440 | |
| 441 | hdmi_receiver: hdmi-receiver@48 { |
| 442 | compatible = "nxp,tda19971"; |
| 443 | pinctrl-names = "default"; |
| 444 | pinctrl-0 = <&pinctrl_tda1997x>; |
| 445 | reg = <0x48>; |
| 446 | interrupt-parent = <&gpio1>; |
| 447 | interrupts = <7 IRQ_TYPE_LEVEL_LOW>; |
| 448 | DOVDD-supply = <®_3p3>; |
| 449 | AVDD-supply = <®_1p8b>; |
| 450 | DVDD-supply = <®_1p8a>; |
| 451 | #sound-dai-cells = <0>; |
| 452 | nxp,audout-format = "i2s"; |
| 453 | nxp,audout-layout = <0>; |
| 454 | nxp,audout-width = <16>; |
| 455 | nxp,audout-mclk-fs = <128>; |
| 456 | /* |
| 457 | * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4] |
| 458 | * and Y[11:4] across 16bits in the same cycle |
| 459 | * which we map to VP[15:08]<->CSI_DATA[19:12] |
| 460 | */ |
| 461 | nxp,vidout-portcfg = |
| 462 | /*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/ |
| 463 | < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, |
| 464 | /*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/ |
| 465 | < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, |
| 466 | /*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/ |
| 467 | < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, |
| 468 | /*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/ |
| 469 | < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; |
| 470 | |
| 471 | port { |
| 472 | tda1997x_to_ipu1_csi0_mux: endpoint { |
| 473 | remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; |
| 474 | bus-width = <16>; |
| 475 | hsync-active = <1>; |
| 476 | vsync-active = <1>; |
| 477 | data-active = <1>; |
| 478 | }; |
| 479 | }; |
| 480 | }; |
| 481 | }; |
| 482 | |
| 483 | &ipu1_csi0_from_ipu1_csi0_mux { |
| 484 | bus-width = <16>; |
| 485 | }; |
| 486 | |
| 487 | &ipu1_csi0_mux_from_parallel_sensor { |
| 488 | remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>; |
| 489 | bus-width = <16>; |
| 490 | }; |
| 491 | |
| 492 | &ipu1_csi0 { |
| 493 | pinctrl-names = "default"; |
| 494 | pinctrl-0 = <&pinctrl_ipu1_csi0>; |
| 495 | }; |
| 496 | |
| 497 | &pcie { |
| 498 | pinctrl-names = "default"; |
| 499 | pinctrl-0 = <&pinctrl_pcie>; |
| 500 | reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; |
| 501 | status = "okay"; |
| 502 | }; |
| 503 | |
| 504 | &pwm2 { |
| 505 | pinctrl-names = "default"; |
| 506 | pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ |
| 507 | status = "disabled"; |
| 508 | }; |
| 509 | |
| 510 | &pwm3 { |
| 511 | pinctrl-names = "default"; |
| 512 | pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ |
| 513 | status = "disabled"; |
| 514 | }; |
| 515 | |
| 516 | &ssi1 { |
| 517 | status = "okay"; |
| 518 | }; |
| 519 | |
| 520 | &uart2 { |
| 521 | pinctrl-names = "default"; |
| 522 | pinctrl-0 = <&pinctrl_uart2>; |
| 523 | status = "okay"; |
| 524 | }; |
| 525 | |
| 526 | &uart3 { |
| 527 | pinctrl-names = "default"; |
| 528 | pinctrl-0 = <&pinctrl_uart3>; |
| 529 | status = "okay"; |
| 530 | }; |
| 531 | |
| 532 | &usbotg { |
| 533 | vbus-supply = <®_usb_otg_vbus>; |
| 534 | pinctrl-names = "default"; |
| 535 | pinctrl-0 = <&pinctrl_usbotg>; |
| 536 | disable-over-current; |
Tim Harvey | acb9a13 | 2021-03-01 14:33:30 -0800 | [diff] [blame] | 537 | status = "okay"; |
| 538 | }; |
| 539 | |
| 540 | &usbh1 { |
| 541 | vbus-supply = <®_usb_h1_vbus>; |
| 542 | status = "okay"; |
| 543 | }; |
| 544 | |
| 545 | &wdog1 { |
| 546 | pinctrl-names = "default"; |
| 547 | pinctrl-0 = <&pinctrl_wdog>; |
| 548 | fsl,ext-reset-output; |
| 549 | }; |
| 550 | |
| 551 | &iomuxc { |
| 552 | pinctrl_audmux: audmuxgrp { |
| 553 | fsl,pins = < |
| 554 | MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 |
| 555 | MX6QDL_PAD_DISP0_DAT14__AUD5_RXC 0x130b0 |
| 556 | MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS 0x130b0 |
| 557 | >; |
| 558 | }; |
| 559 | |
| 560 | pinctrl_flexcan1: flexcan1grp { |
| 561 | fsl,pins = < |
| 562 | MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 |
| 563 | MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 |
| 564 | MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */ |
| 565 | >; |
| 566 | }; |
| 567 | |
| 568 | pinctrl_gpio_leds: gpioledsgrp { |
| 569 | fsl,pins = < |
| 570 | MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 |
| 571 | >; |
| 572 | }; |
| 573 | |
| 574 | pinctrl_gpmi_nand: gpminandgrp { |
| 575 | fsl,pins = < |
| 576 | MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 |
| 577 | MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 |
| 578 | MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 |
| 579 | MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 |
| 580 | MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 |
| 581 | MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 |
| 582 | MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 |
| 583 | MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 |
| 584 | MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 |
| 585 | MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 |
| 586 | MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 |
| 587 | MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 |
| 588 | MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 |
| 589 | MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 |
| 590 | MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 |
| 591 | >; |
| 592 | }; |
| 593 | |
| 594 | pinctrl_i2c1: i2c1grp { |
| 595 | fsl,pins = < |
| 596 | MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 |
| 597 | MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 |
| 598 | MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1 |
| 599 | >; |
| 600 | }; |
| 601 | |
| 602 | pinctrl_i2c2: i2c2grp { |
| 603 | fsl,pins = < |
| 604 | MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
| 605 | MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
| 606 | >; |
| 607 | }; |
| 608 | |
| 609 | pinctrl_i2c3: i2c3grp { |
| 610 | fsl,pins = < |
| 611 | MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 |
| 612 | MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 |
| 613 | >; |
| 614 | }; |
| 615 | |
| 616 | pinctrl_ipu1_csi0: ipu1_csi0grp { |
| 617 | fsl,pins = < |
| 618 | MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x1b0b0 |
| 619 | MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x1b0b0 |
| 620 | MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x1b0b0 |
| 621 | MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x1b0b0 |
| 622 | MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x1b0b0 |
| 623 | MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x1b0b0 |
| 624 | MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x1b0b0 |
| 625 | MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x1b0b0 |
| 626 | MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 |
| 627 | MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 |
| 628 | MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 |
| 629 | MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 |
| 630 | MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 |
| 631 | MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 |
| 632 | MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 |
| 633 | MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 |
| 634 | MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 |
| 635 | MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 |
| 636 | MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 |
| 637 | >; |
| 638 | }; |
| 639 | |
| 640 | pinctrl_pcie: pciegrp { |
| 641 | fsl,pins = < |
| 642 | MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */ |
| 643 | >; |
| 644 | }; |
| 645 | |
| 646 | pinctrl_pmic: pmicgrp { |
| 647 | fsl,pins = < |
| 648 | MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ |
| 649 | >; |
| 650 | }; |
| 651 | |
| 652 | pinctrl_pwm2: pwm2grp { |
| 653 | fsl,pins = < |
| 654 | MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 |
| 655 | >; |
| 656 | }; |
| 657 | |
| 658 | pinctrl_pwm3: pwm3grp { |
| 659 | fsl,pins = < |
| 660 | MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 |
| 661 | >; |
| 662 | }; |
| 663 | |
| 664 | pinctrl_tda1997x: tda1997xgrp { |
| 665 | fsl,pins = < |
| 666 | MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 |
| 667 | >; |
| 668 | }; |
| 669 | |
| 670 | pinctrl_uart2: uart2grp { |
| 671 | fsl,pins = < |
| 672 | MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 |
| 673 | MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 |
| 674 | >; |
| 675 | }; |
| 676 | |
| 677 | pinctrl_uart3: uart3grp { |
| 678 | fsl,pins = < |
| 679 | MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 |
| 680 | MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 |
| 681 | >; |
| 682 | }; |
| 683 | |
| 684 | pinctrl_usbotg: usbotggrp { |
| 685 | fsl,pins = < |
| 686 | MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 |
| 687 | >; |
| 688 | }; |
| 689 | |
| 690 | pinctrl_wdog: wdoggrp { |
| 691 | fsl,pins = < |
| 692 | MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 |
| 693 | >; |
| 694 | }; |
| 695 | }; |