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TsiChung Liew05316f82008-08-11 13:41:49 +00001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Alison Wang198cafb2012-03-26 21:49:08 +00005 * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc.
TsiChung Liew05316f82008-08-11 13:41:49 +00006 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
TsiChung Liew05316f82008-08-11 13:41:49 +00009 */
10
11#include <common.h>
12#include <spi.h>
13#include <asm/immap.h>
Alison Wang198cafb2012-03-26 21:49:08 +000014#include <asm/io.h>
TsiChung Liew05316f82008-08-11 13:41:49 +000015
16DECLARE_GLOBAL_DATA_PTR;
17
18int checkboard(void)
19{
20 /*
21 * need to to:
22 * Check serial flash size. if 2mb evb, else 8mb demo
23 */
24 puts("Board: ");
25 puts("Freescale M54451 EVB\n");
26 return 0;
27};
28
Simon Glassf1683aa2017-04-06 12:47:05 -060029int dram_init(void)
TsiChung Liew05316f82008-08-11 13:41:49 +000030{
31 u32 dramsize;
32#ifdef CONFIG_CF_SBF
33 /*
34 * Serial Boot: The dram is already initialized in start.S
35 * only require to return DRAM size
36 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020037 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
TsiChung Liew05316f82008-08-11 13:41:49 +000038#else
Alison Wang198cafb2012-03-26 21:49:08 +000039 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
40 gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
TsiChung Liew05316f82008-08-11 13:41:49 +000041 u32 i;
42
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020043 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
TsiChung Liew05316f82008-08-11 13:41:49 +000044
Alison Wang198cafb2012-03-26 21:49:08 +000045 if ((in_be32(&sdram->sdcfg1) == CONFIG_SYS_SDRAM_CFG1) &&
46 (in_be32(&sdram->sdcfg2) == CONFIG_SYS_SDRAM_CFG2))
TsiChung Liew05316f82008-08-11 13:41:49 +000047 return dramsize;
48
49 for (i = 0x13; i < 0x20; i++) {
50 if (dramsize == (1 << i))
51 break;
52 }
53 i--;
54
Alison Wang198cafb2012-03-26 21:49:08 +000055 out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH);
TsiChung Liew05316f82008-08-11 13:41:49 +000056
Alison Wang198cafb2012-03-26 21:49:08 +000057 out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i);
TsiChung Liew05316f82008-08-11 13:41:49 +000058
Alison Wang198cafb2012-03-26 21:49:08 +000059 out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1);
60 out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2);
TsiChung Liew05316f82008-08-11 13:41:49 +000061
62 udelay(200);
63
64 /* Issue PALL */
Alison Wang198cafb2012-03-26 21:49:08 +000065 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liew05316f82008-08-11 13:41:49 +000066 __asm__("nop");
67
68 /* Perform two refresh cycles */
Alison Wang198cafb2012-03-26 21:49:08 +000069 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew05316f82008-08-11 13:41:49 +000070 __asm__("nop");
Alison Wang198cafb2012-03-26 21:49:08 +000071 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew05316f82008-08-11 13:41:49 +000072 __asm__("nop");
73
74 /* Issue LEMR */
Alison Wang198cafb2012-03-26 21:49:08 +000075 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
TsiChung Liew05316f82008-08-11 13:41:49 +000076 __asm__("nop");
Alison Wang198cafb2012-03-26 21:49:08 +000077 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
TsiChung Liew05316f82008-08-11 13:41:49 +000078 __asm__("nop");
79
Alison Wang198cafb2012-03-26 21:49:08 +000080 out_be32(&sdram->sdcr,
81 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000000);
TsiChung Liew05316f82008-08-11 13:41:49 +000082
83 udelay(100);
84#endif
Simon Glass088454c2017-03-31 08:40:25 -060085 gd->ram_size = dramsize;
86
87 return 0;
TsiChung Liew05316f82008-08-11 13:41:49 +000088};
89
90int testdram(void)
91{
92 /* TODO: XXX XXX XXX */
93 printf("DRAM test not implemented!\n");
94
95 return (0);
96}