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Ajay Bhargav26749582011-08-04 21:26:02 +05301/*
2 * (C) Copyright 2011
3 * eInfochips Ltd. <www.einfochips.com>
4 * Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
5 *
6 * Based on Aspenite:
7 * (C) Copyright 2010
8 * Marvell Semiconductor <www.marvell.com>
9 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
10 * Contributor: Mahavir Jain <mjain@marvell.com>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
28 * MA 02110-1301 USA
29 */
30
31#include <common.h>
32#include <mvmfp.h>
33#include <asm/arch/mfp.h>
34#include <asm/arch/armada100.h>
35
Ajay Bhargavaa0ecfe2011-09-13 22:22:04 +053036#ifdef CONFIG_ARMADA100_FEC
37#include <net.h>
38#include <netdev.h>
39#endif /* CONFIG_ARMADA100_FEC */
40
Ajay Bhargav26749582011-08-04 21:26:02 +053041DECLARE_GLOBAL_DATA_PTR;
42
43int board_early_init_f(void)
44{
45 u32 mfp_cfg[] = {
46 /* I2C */
47 MFP105_CI2C_SDA,
48 MFP106_CI2C_SCL,
49
50 /* Enable Console on UART3 */
51 MFPO8_UART3_TXD,
52 MFPO9_UART3_RXD,
Ajay Bhargavaa0ecfe2011-09-13 22:22:04 +053053
54 /* Ethernet PHY Interface */
55 MFP086_ETH_TXCLK,
56 MFP087_ETH_TXEN,
57 MFP088_ETH_TXDQ3,
58 MFP089_ETH_TXDQ2,
59 MFP090_ETH_TXDQ1,
60 MFP091_ETH_TXDQ0,
61 MFP092_ETH_CRS,
62 MFP093_ETH_COL,
63 MFP094_ETH_RXCLK,
64 MFP095_ETH_RXER,
65 MFP096_ETH_RXDQ3,
66 MFP097_ETH_RXDQ2,
67 MFP098_ETH_RXDQ1,
68 MFP099_ETH_RXDQ0,
69 MFP100_ETH_MDC,
70 MFP101_ETH_MDIO,
71 MFP103_ETH_RXDV,
72
Ajay Bhargav26749582011-08-04 21:26:02 +053073 MFP_EOC /*End of configuration*/
74 };
75 /* configure MFP's */
76 mfp_config(mfp_cfg);
77 return 0;
78}
79
80int board_init(void)
81{
82 /* arch number of Board */
83 gd->bd->bi_arch_number = MACH_TYPE_SHEEVAD;
84 /* adress of boot parameters */
85 gd->bd->bi_boot_params = armd1_sdram_base(0) + 0x100;
86 return 0;
87}
Ajay Bhargavaa0ecfe2011-09-13 22:22:04 +053088
89#ifdef CONFIG_ARMADA100_FEC
90int board_eth_init(bd_t *bis)
91{
92 struct armd1apmu_registers *apmu_regs =
93 (struct armd1apmu_registers *)ARMD1_APMU_BASE;
94
95 /* Enable clock of ethernet controller */
96 writel(FE_CLK_RST | FE_CLK_ENA, &apmu_regs->fecrc);
97
98 return armada100_fec_register(ARMD1_FEC_BASE);
99}
100#endif /* CONFIG_ARMADA100_FEC */