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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2002
3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 * Keith Outwater, keith_outwater@mvis.com
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00007 */
8
9#ifndef _VIRTEX2_H_
10#define _VIRTEX2_H_
11
12#include <xilinx.h>
13
Michal Simek14cfc4f2014-03-13 13:07:57 +010014extern struct xilinx_fpga_op virtex2_op;
wdenkc6097192002-11-03 00:24:07 +000015
16/*
17 * Slave SelectMap Implementation function table.
18 */
19typedef struct {
Michal Simek2df9d5c2014-03-13 12:58:20 +010020 xilinx_pre_fn pre;
21 xilinx_pgm_fn pgm;
22 xilinx_init_fn init;
23 xilinx_err_fn err;
24 xilinx_done_fn done;
25 xilinx_clk_fn clk;
26 xilinx_cs_fn cs;
27 xilinx_wr_fn wr;
28 xilinx_rdata_fn rdata;
29 xilinx_wdata_fn wdata;
30 xilinx_busy_fn busy;
31 xilinx_abort_fn abort;
32 xilinx_post_fn post;
Michal Simekd9071ce2014-03-13 11:33:36 +010033} xilinx_virtex2_slave_selectmap_fns;
wdenkc6097192002-11-03 00:24:07 +000034
35/* Slave Serial Implementation function table */
36typedef struct {
Michal Simek2df9d5c2014-03-13 12:58:20 +010037 xilinx_pgm_fn pgm;
38 xilinx_clk_fn clk;
39 xilinx_rdata_fn rdata;
40 xilinx_wdata_fn wdata;
Michal Simekd9071ce2014-03-13 11:33:36 +010041} xilinx_virtex2_slave_serial_fns;
wdenkc6097192002-11-03 00:24:07 +000042
43/* Device Image Sizes (in bytes)
44 *********************************************************************/
45#define XILINX_XC2V40_SIZE (338208 / 8)
46#define XILINX_XC2V80_SIZE (597408 / 8)
47#define XILINX_XC2V250_SIZE (1591584 / 8)
48#define XILINX_XC2V500_SIZE (2557857 / 8)
49#define XILINX_XC2V1000_SIZE (3749408 / 8)
50#define XILINX_XC2V1500_SIZE (5166240 / 8)
51#define XILINX_XC2V2000_SIZE (6808352 / 8)
52#define XILINX_XC2V3000_SIZE (9589408 / 8)
53#define XILINX_XC2V4000_SIZE (14220192 / 8)
54#define XILINX_XC2V6000_SIZE (19752096 / 8)
55#define XILINX_XC2V8000_SIZE (26185120 / 8)
56#define XILINX_XC2V10000_SIZE (33519264 / 8)
57
58/* Descriptor Macros
59 *********************************************************************/
60#define XILINX_XC2V40_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010061{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000062
63#define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010064{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000065
66#define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010067{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000068
69#define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010070{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000071
72#define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010073{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000074
75#define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010076{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000077
78#define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010079{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000080
81#define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010082{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000083
84#define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010085{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000086
87#define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010088{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000089
90#define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010091{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000092
93#define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
Michal Simek14cfc4f2014-03-13 13:07:57 +010094{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, &virtex2_op }
wdenkc6097192002-11-03 00:24:07 +000095
96#endif /* _VIRTEX2_H_ */