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wdenk028ab6b2004-02-23 23:54:43 +00001/*
2 * ML300.h: ML300 specific config options
3 *
4 * http://www.xilinx.com/ml300
5 *
6 * Derived from : ML2.h
7 *
8 * Author: Xilinx, Inc.
9 *
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 *
16 *
17 * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
18 * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
19 * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
20 * XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
21 * FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR
22 * OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
23 * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
24 * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
25 * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
26 * CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
27 * FITNESS FOR A PARTICULAR PURPOSE.
28 *
29 *
30 * Xilinx products are not intended for use in life support appliances,
31 * devices, or systems. Use in such applications is expressly prohibited.
32 *
33 *
34 * (c) Copyright 2002 Xilinx Inc.
35 * All rights reserved.
36 *
37 *
38 * You should have received a copy of the GNU General Public License along
39 * with this program; if not, write to the Free Software Foundation, Inc.,
40 * 675 Mass Ave, Cambridge, MA 02139, USA.
wdenka06752e2004-09-29 22:43:59 +000041 *
wdenk028ab6b2004-02-23 23:54:43 +000042 */
43
44#ifndef __CONFIG_H
45#define __CONFIG_H
46
47/* #define DEBUG */
48/* #define ET_DEBUG 1 */
49
50/*
51 * High Level Configuration Options
52 * (easy to change)
53 */
54
55#define CONFIG_405 1 /* This is a PPC405 CPU */
56#define CONFIG_4xx 1 /* ...member of PPC4xx family */
Michal Simek9fea65a2008-06-24 09:54:09 +020057#define CONFIG_XILINX_405 1
wdenk028ab6b2004-02-23 23:54:43 +000058#define CONFIG_XILINX_ML300 1 /* ...on a Xilinx ML300 board */
59
wdenka5bbcc32004-09-29 22:55:14 +000060#define CONFIG_SYSTEMACE 1
61#define CONFIG_DOS_PARTITION 1
wdenke2ffd592004-12-31 09:32:47 +000062#define CFG_SYSTEMACE_BASE XPAR_OPB_SYSACE_0_BASEADDR
wdenka5bbcc32004-09-29 22:55:14 +000063#define CFG_SYSTEMACE_WIDTH XPAR_XSYSACE_MEM_WIDTH
64
wdenka06752e2004-09-29 22:43:59 +000065#define CFG_ENV_IS_IN_EEPROM 1 /* environment is in EEPROM */
66
67/* following are used only if env is in EEPROM */
68#ifdef CFG_ENV_IS_IN_EEPROM
69#define CFG_I2C_EEPROM_ADDR XPAR_PERSISTENT_0_IIC_0_EEPROMADDR
70#define CFG_I2C_EEPROM_ADDR_LEN 1
71#define CFG_ENV_OFFSET XPAR_PERSISTENT_0_IIC_0_BASEADDR
72#define CONFIG_MISC_INIT_R 1 /* used to call out convert_env() */
73#define CONFIG_ENV_OVERWRITE 1 /* allow users to update ethaddr and serial# */
74#endif
75
76#include "../board/xilinx/ml300/xparameters.h"
77
wdenk028ab6b2004-02-23 23:54:43 +000078#define CFG_NO_FLASH 1 /* no flash */
wdenka06752e2004-09-29 22:43:59 +000079#define CFG_ENV_SIZE XPAR_PERSISTENT_0_IIC_0_HIGHADDR - XPAR_PERSISTENT_0_IIC_0_BASEADDR + 1
wdenk028ab6b2004-02-23 23:54:43 +000080#define CONFIG_BAUDRATE 9600
81#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
82
83#define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */
84
85#define CONFIG_BOOTARGS "console=ttyS0,9600 ip=off " \
86 "root=/dev/xsysace/disc0/part3 rw"
87
88#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
89#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
90
wdenk028ab6b2004-02-23 23:54:43 +000091
Jon Loeliger5dc11a52007-07-04 22:33:01 -050092/*
Jon Loeliger7f5c0152007-07-10 09:38:02 -050093 * BOOTP options
94 */
95#define CONFIG_BOOTP_BOOTFILESIZE
96#define CONFIG_BOOTP_BOOTPATH
97#define CONFIG_BOOTP_GATEWAY
98#define CONFIG_BOOTP_HOSTNAME
99
100
101/*
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500102 * Command line configuration.
103 */
104#include <config_cmd_default.h>
105
106#define CONFIG_CMD_NET
107
108#undef CONFIG_CMD_FLASH
109#undef CONFIG_CMD_LOADS
110#undef CONFIG_CMD_FAT
111#undef CONFIG_CMD_IMLS
112
wdenk028ab6b2004-02-23 23:54:43 +0000113
114/* #define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ */
115/* 300000000 */
116
117/*
118 * Miscellaneous configurable options
119 */
120#define CFG_LONGHELP /* undef to save memory */
121#define CFG_PROMPT "=> " /* Monitor Command Prompt */
122
123#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
124
125#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
126#define CFG_MAXARGS 16 /* max number of command args */
127#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
128
129#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
130#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
131
132#define CFG_DUART_CHAN 0
133#define CFG_NS16550_REG_SIZE -4
134#define CFG_NS16550 1
135#define CFG_INIT_CHAN1 1
136
137/* The following table includes the supported baudrates */
138#define CFG_BAUDRATE_TABLE \
139 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
140
141#define CFG_LOAD_ADDR 0x400000 /* default load address */
142#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
143
144#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
145
146/*-----------------------------------------------------------------------
147 * Start addresses for the final memory configuration
148 * (Set up by the startup code)
149 * Please note that CFG_SDRAM_BASE _must_ start at 0
150 */
151#define CFG_SDRAM_BASE 0x00000000
152#define CFG_MONITOR_BASE 0x04000000
153#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
154#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
155
156/*
157 * For booting Linux, the board info and command line data
158 * have to be in the first 8 MB of memory, since this is
159 * the maximum mapped by the Linux kernel during initialization.
160 */
161#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
162
163/*-----------------------------------------------------------------------
wdenk028ab6b2004-02-23 23:54:43 +0000164 * Definitions for initial stack pointer and data area (in DPRAM)
165 */
166
167#define CFG_INIT_RAM_ADDR 0x800000 /* inside of SDRAM */
168#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
169#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
170#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
171#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
172
173/*
174 * Internal Definitions
175 *
176 * Boot Flags
177 */
178#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
179#define BOOTFLAG_WARM 0x02 /* Software reboot */
180
181#endif /* __CONFIG_H */