blob: 7373298df673a97dc759d35e2759f68cc6e83562 [file] [log] [blame]
Dave Gerlachb6059dd2021-04-23 11:27:46 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6/dts-v1/;
7
8#include "k3-am642.dtsi"
Dave Gerlachfe0f3e32021-05-04 18:00:52 -05009#include "k3-am64-evm-ddr4-1600MTs.dtsi"
10#include "k3-am64-ddr.dtsi"
Dave Gerlachb6059dd2021-04-23 11:27:46 -050011
12/ {
13 chosen {
14 stdout-path = "serial2:115200n8";
15 tick-timer = &timer1;
16 };
17
18 aliases {
19 remoteproc0 = &sysctrler;
20 remoteproc1 = &a53_0;
21 };
22
23 memory@80000000 {
24 device_type = "memory";
25 /* 2G RAM */
26 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
27
28 };
29
30 a53_0: a53@0 {
31 compatible = "ti,am654-rproc";
32 reg = <0x00 0x00a90000 0x00 0x10>;
33 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
34 <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>;
35 resets = <&k3_reset 135 0>;
36 clocks = <&k3_clks 61 0>;
37 assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
38 assigned-clock-parents = <&k3_clks 61 2>;
39 assigned-clock-rates = <200000000>, <1000000000>;
40 ti,sci = <&dmsc>;
41 ti,sci-proc-id = <32>;
42 ti,sci-host-id = <10>;
43 u-boot,dm-spl;
44 };
45
46 reserved-memory {
47 #address-cells = <2>;
48 #size-cells = <2>;
49 ranges;
50
51 secure_ddr: optee@9e800000 {
52 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
53 alignment = <0x1000>;
54 no-map;
55 };
56 };
57
58 clk_200mhz: dummy-clock-200mhz {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <200000000>;
62 u-boot,dm-spl;
63 };
64};
65
66&cbass_main {
67 sysctrler: sysctrler {
68 compatible = "ti,am654-system-controller";
69 mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>;
70 mbox-names = "tx", "rx";
71 u-boot,dm-spl;
72 };
73};
74
75&main_pmx0 {
76 u-boot,dm-spl;
77 main_uart0_pins_default: main-uart0-pins-default {
78 u-boot,dm-spl;
79 pinctrl-single,pins = <
80 AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
81 AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
82 AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
83 AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
84 >;
85 };
86
87 main_uart1_pins_default: main-uart1-pins-default {
88 u-boot,dm-spl;
89 pinctrl-single,pins = <
90 AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
91 AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */
92 AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
93 AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */
94 >;
95 };
96
97 main_mmc0_pins_default: main-mmc0-pins-default {
98 u-boot,dm-spl;
99 pinctrl-single,pins = <
100 AM64X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
101 AM64X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
102 AM64X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
103 AM64X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
104 AM64X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
105 AM64X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
106 AM64X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
107 AM64X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
108 AM64X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
109 AM64X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
110 AM64X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
111 >;
112 };
113
114 main_mmc1_pins_default: main-mmc1-pins-default {
115 u-boot,dm-spl;
116 pinctrl-single,pins = <
117 AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
118 AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
119 AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */
120 AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
121 AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
122 AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
123 AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
124 AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */
125 >;
126 };
127};
128
129&dmsc {
130 mboxes= <&secure_proxy_main 0>,
131 <&secure_proxy_main 1>,
132 <&secure_proxy_main 0>;
133 mbox-names = "rx", "tx", "notify";
134 ti,host-id = <35>;
135 ti,secure-host;
136};
137
138&main_uart0 {
139 /delete-property/ power-domains;
140 /delete-property/ clocks;
141 /delete-property/ clock-names;
142 pinctrl-names = "default";
143 pinctrl-0 = <&main_uart0_pins_default>;
144 status = "okay";
145};
146
147&main_uart1 {
148 u-boot,dm-spl;
149 pinctrl-names = "default";
150 pinctrl-0 = <&main_uart1_pins_default>;
151};
152
153&sdhci0 {
154 /delete-property/ power-domains;
155 clocks = <&clk_200mhz>;
156 clock-names = "clk_xin";
157 ti,driver-strength-ohm = <50>;
158 disable-wp;
159 pinctrl-0 = <&main_mmc0_pins_default>;
160};
161
162&sdhci1 {
163 /delete-property/ power-domains;
164 clocks = <&clk_200mhz>;
165 clock-names = "clk_xin";
166 ti,driver-strength-ohm = <50>;
167 disable-wp;
168 pinctrl-0 = <&main_mmc1_pins_default>;
169};
170
171#include "k3-am642-evm-u-boot.dtsi"