blob: 46c2c74c927b06b8b7212b928a10ae3fa39df95f [file] [log] [blame]
Dave Gerlachb6059dd2021-04-23 11:27:46 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6/dts-v1/;
7
8#include "k3-am642.dtsi"
9
10/ {
11 chosen {
12 stdout-path = "serial2:115200n8";
13 tick-timer = &timer1;
14 };
15
16 aliases {
17 remoteproc0 = &sysctrler;
18 remoteproc1 = &a53_0;
19 };
20
21 memory@80000000 {
22 device_type = "memory";
23 /* 2G RAM */
24 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
25
26 };
27
28 a53_0: a53@0 {
29 compatible = "ti,am654-rproc";
30 reg = <0x00 0x00a90000 0x00 0x10>;
31 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
32 <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>;
33 resets = <&k3_reset 135 0>;
34 clocks = <&k3_clks 61 0>;
35 assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
36 assigned-clock-parents = <&k3_clks 61 2>;
37 assigned-clock-rates = <200000000>, <1000000000>;
38 ti,sci = <&dmsc>;
39 ti,sci-proc-id = <32>;
40 ti,sci-host-id = <10>;
41 u-boot,dm-spl;
42 };
43
44 reserved-memory {
45 #address-cells = <2>;
46 #size-cells = <2>;
47 ranges;
48
49 secure_ddr: optee@9e800000 {
50 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
51 alignment = <0x1000>;
52 no-map;
53 };
54 };
55
56 clk_200mhz: dummy-clock-200mhz {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <200000000>;
60 u-boot,dm-spl;
61 };
62};
63
64&cbass_main {
65 sysctrler: sysctrler {
66 compatible = "ti,am654-system-controller";
67 mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>;
68 mbox-names = "tx", "rx";
69 u-boot,dm-spl;
70 };
71};
72
73&main_pmx0 {
74 u-boot,dm-spl;
75 main_uart0_pins_default: main-uart0-pins-default {
76 u-boot,dm-spl;
77 pinctrl-single,pins = <
78 AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
79 AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
80 AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
81 AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
82 >;
83 };
84
85 main_uart1_pins_default: main-uart1-pins-default {
86 u-boot,dm-spl;
87 pinctrl-single,pins = <
88 AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
89 AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */
90 AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
91 AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */
92 >;
93 };
94
95 main_mmc0_pins_default: main-mmc0-pins-default {
96 u-boot,dm-spl;
97 pinctrl-single,pins = <
98 AM64X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
99 AM64X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
100 AM64X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
101 AM64X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
102 AM64X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
103 AM64X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
104 AM64X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
105 AM64X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
106 AM64X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
107 AM64X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
108 AM64X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
109 >;
110 };
111
112 main_mmc1_pins_default: main-mmc1-pins-default {
113 u-boot,dm-spl;
114 pinctrl-single,pins = <
115 AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
116 AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
117 AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */
118 AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
119 AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
120 AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
121 AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
122 AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */
123 >;
124 };
125};
126
127&dmsc {
128 mboxes= <&secure_proxy_main 0>,
129 <&secure_proxy_main 1>,
130 <&secure_proxy_main 0>;
131 mbox-names = "rx", "tx", "notify";
132 ti,host-id = <35>;
133 ti,secure-host;
134};
135
136&main_uart0 {
137 /delete-property/ power-domains;
138 /delete-property/ clocks;
139 /delete-property/ clock-names;
140 pinctrl-names = "default";
141 pinctrl-0 = <&main_uart0_pins_default>;
142 status = "okay";
143};
144
145&main_uart1 {
146 u-boot,dm-spl;
147 pinctrl-names = "default";
148 pinctrl-0 = <&main_uart1_pins_default>;
149};
150
151&sdhci0 {
152 /delete-property/ power-domains;
153 clocks = <&clk_200mhz>;
154 clock-names = "clk_xin";
155 ti,driver-strength-ohm = <50>;
156 disable-wp;
157 pinctrl-0 = <&main_mmc0_pins_default>;
158};
159
160&sdhci1 {
161 /delete-property/ power-domains;
162 clocks = <&clk_200mhz>;
163 clock-names = "clk_xin";
164 ti,driver-strength-ohm = <50>;
165 disable-wp;
166 pinctrl-0 = <&main_mmc1_pins_default>;
167};
168
169#include "k3-am642-evm-u-boot.dtsi"