Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Andy Shevchenko | 495f377 | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2017 Intel Corporation |
Andy Shevchenko | 495f377 | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include <dt-bindings/gpio/x86-gpio.h> |
| 9 | #include <dt-bindings/interrupt-router/intel-irq.h> |
| 10 | |
| 11 | /include/ "skeleton.dtsi" |
| 12 | /include/ "rtc.dtsi" |
| 13 | /include/ "tsc_timer.dtsi" |
| 14 | |
| 15 | / { |
| 16 | model = "Intel Edison"; |
| 17 | compatible = "intel,edison"; |
| 18 | |
| 19 | aliases { |
Andy Shevchenko | ab83e5c | 2019-02-28 10:10:06 +0200 | [diff] [blame^] | 20 | serial2 = &serial2; |
Andy Shevchenko | 495f377 | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 21 | }; |
| 22 | |
| 23 | chosen { |
Andy Shevchenko | ab83e5c | 2019-02-28 10:10:06 +0200 | [diff] [blame^] | 24 | stdout-path = &serial2; |
Andy Shevchenko | 495f377 | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 25 | }; |
| 26 | |
| 27 | cpus { |
| 28 | #address-cells = <1>; |
| 29 | #size-cells = <0>; |
| 30 | |
| 31 | cpu@0 { |
| 32 | device_type = "cpu"; |
| 33 | compatible = "cpu-x86"; |
| 34 | reg = <0>; |
| 35 | intel,apic-id = <0>; |
| 36 | }; |
| 37 | |
| 38 | cpu@1 { |
| 39 | device_type = "cpu"; |
| 40 | compatible = "cpu-x86"; |
| 41 | reg = <1>; |
| 42 | intel,apic-id = <2>; |
| 43 | }; |
| 44 | }; |
| 45 | |
| 46 | pci { |
| 47 | compatible = "pci-x86"; |
| 48 | #address-cells = <3>; |
| 49 | #size-cells = <2>; |
| 50 | u-boot,dm-pre-reloc; |
| 51 | ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000 |
| 52 | 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000 |
| 53 | 0x01000000 0x0 0x2000 0x2000 0 0xe000>; |
| 54 | }; |
| 55 | |
Andy Shevchenko | ab83e5c | 2019-02-28 10:10:06 +0200 | [diff] [blame^] | 56 | serial2: serial@ff010180 { |
Andy Shevchenko | 495f377 | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 57 | compatible = "intel,mid-uart"; |
| 58 | reg = <0xff010180 0x100>; |
| 59 | reg-shift = <0>; |
| 60 | clock-frequency = <29491200>; |
| 61 | current-speed = <115200>; |
| 62 | }; |
| 63 | |
| 64 | emmc: mmc@ff3fc000 { |
| 65 | compatible = "intel,sdhci-tangier"; |
| 66 | reg = <0xff3fc000 0x1000>; |
| 67 | }; |
| 68 | |
| 69 | /* |
| 70 | * FIXME: For now U-Boot DM model doesn't allow to power up this controller. |
| 71 | * Enabling it will make U-Boot hang. |
| 72 | * |
| 73 | sdcard: mmc@ff3fa000 { |
| 74 | compatible = "intel,sdhci-tangier"; |
| 75 | reg = <0xff3fa000 0x1000>; |
| 76 | }; |
| 77 | */ |
| 78 | |
| 79 | pmu: power@ff00b000 { |
| 80 | compatible = "intel,pmu-mid"; |
| 81 | reg = <0xff00b000 0x1000>; |
| 82 | }; |
| 83 | |
| 84 | scu: ipc@ff009000 { |
| 85 | compatible = "intel,scu-ipc"; |
| 86 | reg = <0xff009000 0x1000>; |
| 87 | }; |
Bin Meng | b37b7b2 | 2018-07-19 03:07:33 -0700 | [diff] [blame] | 88 | |
| 89 | reset { |
| 90 | compatible = "intel,reset-tangier"; |
| 91 | u-boot,dm-pre-reloc; |
| 92 | }; |
Georgii Staroselskii | f26b260 | 2018-09-11 13:31:08 +0300 | [diff] [blame] | 93 | |
| 94 | pinctrl { |
| 95 | compatible = "intel,pinctrl-tangier"; |
| 96 | reg = <0xff0c0000 0x8000>; |
| 97 | |
| 98 | /* |
| 99 | * Initial configuration came from the firmware. |
| 100 | * Which quite likely has been used in the phones, where I2C #8, |
| 101 | * that is not part of Atom peripheral, is in use. |
| 102 | * Thus we need to override the leftover. |
| 103 | */ |
| 104 | i2c6_scl@0 { |
| 105 | pad-offset = <111>; |
| 106 | mode-func = <1>; |
| 107 | protected; |
| 108 | }; |
| 109 | i2c6_sda@0 { |
| 110 | pad-offset = <112>; |
| 111 | mode-func = <1>; |
| 112 | protected; |
| 113 | }; |
| 114 | }; |
Andy Shevchenko | 495f377 | 2017-07-06 14:41:53 +0300 | [diff] [blame] | 115 | }; |