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wdenke85390d2002-04-01 14:29:03 +00001/*
2 * COM1 NS16550 support
Stefan Roesea47a12b2010-04-15 16:07:28 +02003 * originally from linux source (arch/powerpc/boot/ns16550.c)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02004 * modified to use CONFIG_SYS_ISA_MEM and new defines
wdenke85390d2002-04-01 14:29:03 +00005 */
6
Simon Glassfa54eb12014-09-04 16:27:32 -06007#include <common.h>
Paul Burton50fce1d2016-09-08 07:47:29 +01008#include <clk.h>
Simon Glass12e431b2014-09-04 16:27:34 -06009#include <dm.h>
10#include <errno.h>
11#include <fdtdec.h>
wdenke85390d2002-04-01 14:29:03 +000012#include <ns16550.h>
Simon Glass12e431b2014-09-04 16:27:34 -060013#include <serial.h>
Ladislav Michla1b322a2010-02-01 23:34:25 +010014#include <watchdog.h>
Graeme Russ167cdad2010-04-24 00:05:46 +100015#include <linux/types.h>
Tom Rini82f52792016-09-22 15:36:45 -040016#include <linux/compiler.h>
Graeme Russ167cdad2010-04-24 00:05:46 +100017#include <asm/io.h>
wdenke85390d2002-04-01 14:29:03 +000018
Simon Glass12e431b2014-09-04 16:27:34 -060019DECLARE_GLOBAL_DATA_PTR;
20
Detlev Zundel200779e2009-04-03 11:53:01 +020021#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
22#define UART_MCRVAL (UART_MCR_DTR | \
23 UART_MCR_RTS) /* RTS/DTR */
24#define UART_FCRVAL (UART_FCR_FIFO_EN | \
25 UART_FCR_RXSR | \
26 UART_FCR_TXSR) /* Clear & enable FIFOs */
Simon Glass12e431b2014-09-04 16:27:34 -060027
28#ifndef CONFIG_DM_SERIAL
Graeme Russ167cdad2010-04-24 00:05:46 +100029#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glassf8df9d02011-10-15 19:14:09 +000030#define serial_out(x, y) outb(x, (ulong)y)
31#define serial_in(y) inb((ulong)y)
Dave Aldridge79df1202011-09-01 22:47:14 +000032#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
Simon Glassf8df9d02011-10-15 19:14:09 +000033#define serial_out(x, y) out_be32(y, x)
34#define serial_in(y) in_be32(y)
Dave Aldridge79df1202011-09-01 22:47:14 +000035#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
Simon Glassf8df9d02011-10-15 19:14:09 +000036#define serial_out(x, y) out_le32(y, x)
37#define serial_in(y) in_le32(y)
Graeme Russ167cdad2010-04-24 00:05:46 +100038#else
Simon Glassf8df9d02011-10-15 19:14:09 +000039#define serial_out(x, y) writeb(x, y)
40#define serial_in(y) readb(y)
Graeme Russ167cdad2010-04-24 00:05:46 +100041#endif
Simon Glass12e431b2014-09-04 16:27:34 -060042#endif /* !CONFIG_DM_SERIAL */
wdenke85390d2002-04-01 14:29:03 +000043
Khoronzhuk, Ivan7c387642014-07-16 00:59:25 +030044#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianovef509b92014-04-04 13:16:53 -040045#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
46#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -040047#undef UART_MCRVAL
48#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
49#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
50#else
51#define UART_MCRVAL (UART_MCR_RTS)
52#endif
Vitaly Andrianovef509b92014-04-04 13:16:53 -040053#endif
54
Prafulla Wadaskara160ea02010-10-27 21:58:31 +053055#ifndef CONFIG_SYS_NS16550_IER
56#define CONFIG_SYS_NS16550_IER 0x00
57#endif /* CONFIG_SYS_NS16550_IER */
58
Simon Glass363e6da2015-02-27 22:06:26 -070059static inline void serial_out_shift(void *addr, int shift, int value)
Simon Glass76571672015-01-26 18:27:08 -070060{
61#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
62 outb(value, (ulong)addr);
63#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
64 out_le32(addr, value);
65#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
66 out_be32(addr, value);
Simon Glass90914002015-05-12 14:55:02 -060067#elif defined(CONFIG_SYS_NS16550_MEM32)
68 writel(value, addr);
Simon Glass76571672015-01-26 18:27:08 -070069#elif defined(CONFIG_SYS_BIG_ENDIAN)
70 writeb(value, addr + (1 << shift) - 1);
71#else
72 writeb(value, addr);
73#endif
74}
75
Simon Glass363e6da2015-02-27 22:06:26 -070076static inline int serial_in_shift(void *addr, int shift)
Simon Glass76571672015-01-26 18:27:08 -070077{
78#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
79 return inb((ulong)addr);
80#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
81 return in_le32(addr);
82#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
83 return in_be32(addr);
Simon Glass90914002015-05-12 14:55:02 -060084#elif defined(CONFIG_SYS_NS16550_MEM32)
85 return readl(addr);
Simon Glass76571672015-01-26 18:27:08 -070086#elif defined(CONFIG_SYS_BIG_ENDIAN)
Axel Lin20379c12015-02-28 15:55:36 +080087 return readb(addr + (1 << shift) - 1);
Simon Glass76571672015-01-26 18:27:08 -070088#else
89 return readb(addr);
90#endif
91}
92
Marek Vasutfa4ce722016-05-25 02:13:03 +020093#ifdef CONFIG_DM_SERIAL
94
95#ifndef CONFIG_SYS_NS16550_CLK
96#define CONFIG_SYS_NS16550_CLK 0
97#endif
98
Simon Glass12e431b2014-09-04 16:27:34 -060099static void ns16550_writeb(NS16550_t port, int offset, int value)
100{
101 struct ns16550_platdata *plat = port->plat;
102 unsigned char *addr;
103
104 offset *= 1 << plat->reg_shift;
Paul Burtondf8ec552016-05-17 07:43:26 +0100105 addr = (unsigned char *)plat->base + offset;
106
Simon Glass12e431b2014-09-04 16:27:34 -0600107 /*
108 * As far as we know it doesn't make sense to support selection of
109 * these options at run-time, so use the existing CONFIG options.
110 */
Michal Simek59b35dd2016-02-16 16:17:49 +0100111 serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
Simon Glass12e431b2014-09-04 16:27:34 -0600112}
113
114static int ns16550_readb(NS16550_t port, int offset)
115{
116 struct ns16550_platdata *plat = port->plat;
117 unsigned char *addr;
118
119 offset *= 1 << plat->reg_shift;
Paul Burtondf8ec552016-05-17 07:43:26 +0100120 addr = (unsigned char *)plat->base + offset;
Simon Glass76571672015-01-26 18:27:08 -0700121
Michal Simek59b35dd2016-02-16 16:17:49 +0100122 return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
Simon Glass12e431b2014-09-04 16:27:34 -0600123}
124
125/* We can clean these up once everything is moved to driver model */
126#define serial_out(value, addr) \
Simon Glass363e6da2015-02-27 22:06:26 -0700127 ns16550_writeb(com_port, \
128 (unsigned char *)addr - (unsigned char *)com_port, value)
Simon Glass12e431b2014-09-04 16:27:34 -0600129#define serial_in(addr) \
Simon Glass363e6da2015-02-27 22:06:26 -0700130 ns16550_readb(com_port, \
131 (unsigned char *)addr - (unsigned char *)com_port)
Simon Glass12e431b2014-09-04 16:27:34 -0600132#endif
133
Marek Vasut03c6f172016-05-25 02:13:16 +0200134int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
Simon Glassfa54eb12014-09-04 16:27:32 -0600135{
136 const unsigned int mode_x_div = 16;
137
Simon Glass21d00432015-01-26 18:27:09 -0700138 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
139}
140
Simon Glass8bbe33c2014-09-04 16:27:33 -0600141static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
142{
143 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
144 serial_out(baud_divisor & 0xff, &com_port->dll);
145 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
146 serial_out(UART_LCRVAL, &com_port->lcr);
147}
148
Simon Glassf8df9d02011-10-15 19:14:09 +0000149void NS16550_init(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000150{
Gregoire Gentil956a8ba2014-11-10 11:04:10 -0800151#if (defined(CONFIG_SPL_BUILD) && \
152 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000153 /*
Gregoire Gentil956a8ba2014-11-10 11:04:10 -0800154 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
155 * before SPL starts only THRE bit is set. We have to empty the
156 * transmitter before initialization starts.
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000157 */
158 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
159 == UART_LSR_THRE) {
Simon Glass12e431b2014-09-04 16:27:34 -0600160 if (baud_divisor != -1)
161 NS16550_setbrg(com_port, baud_divisor);
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000162 serial_out(0, &com_port->mdr1);
163 }
164#endif
165
Scott Woodcb55b332012-09-18 18:19:05 -0500166 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
167 ;
168
Prafulla Wadaskara160ea02010-10-27 21:58:31 +0530169 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Tom Rini456ccfd2013-12-20 11:19:33 -0500170#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
171 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
Graeme Russ167cdad2010-04-24 00:05:46 +1000172 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
wdenk945af8d2003-07-16 21:53:01 +0000173#endif
Graeme Russ167cdad2010-04-24 00:05:46 +1000174 serial_out(UART_MCRVAL, &com_port->mcr);
175 serial_out(UART_FCRVAL, &com_port->fcr);
Simon Glass12e431b2014-09-04 16:27:34 -0600176 if (baud_divisor != -1)
177 NS16550_setbrg(com_port, baud_divisor);
Masahiro Yamada8ac22a62014-07-30 19:11:41 +0900178#if defined(CONFIG_OMAP) || \
Matt Porter6213a682013-03-15 10:07:09 +0000179 defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
TENART Antoine9ed6e412013-07-02 12:05:58 +0200180 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
Chandan Nath5289e832011-10-14 02:58:26 +0000181
Simon Glassf8df9d02011-10-15 19:14:09 +0000182 /* /16 is proper to hit 115200 with 48MHz */
183 serial_out(0, &com_port->mdr1);
Mike Frysingerb4746d82009-02-11 20:26:52 -0500184#endif /* CONFIG_OMAP */
Khoronzhuk, Ivan7c387642014-07-16 00:59:25 +0300185#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianovef509b92014-04-04 13:16:53 -0400186 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
187#endif
wdenke85390d2002-04-01 14:29:03 +0000188}
189
Ron Madridf5675aa2009-02-18 14:30:44 -0800190#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassf8df9d02011-10-15 19:14:09 +0000191void NS16550_reinit(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000192{
Prafulla Wadaskara160ea02010-10-27 21:58:31 +0530193 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600194 NS16550_setbrg(com_port, 0);
Graeme Russ167cdad2010-04-24 00:05:46 +1000195 serial_out(UART_MCRVAL, &com_port->mcr);
196 serial_out(UART_FCRVAL, &com_port->fcr);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600197 NS16550_setbrg(com_port, baud_divisor);
wdenke85390d2002-04-01 14:29:03 +0000198}
Ron Madridf5675aa2009-02-18 14:30:44 -0800199#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
wdenke85390d2002-04-01 14:29:03 +0000200
Simon Glassf8df9d02011-10-15 19:14:09 +0000201void NS16550_putc(NS16550_t com_port, char c)
wdenke85390d2002-04-01 14:29:03 +0000202{
Simon Glassf8df9d02011-10-15 19:14:09 +0000203 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
204 ;
Graeme Russ167cdad2010-04-24 00:05:46 +1000205 serial_out(c, &com_port->thr);
Stefan Roese1a2d9b32010-10-12 09:39:45 +0200206
207 /*
208 * Call watchdog_reset() upon newline. This is done here in putc
209 * since the environment code uses a single puts() to print the complete
210 * environment upon "printenv". So we can't put this watchdog call
211 * in puts().
212 */
213 if (c == '\n')
214 WATCHDOG_RESET();
wdenke85390d2002-04-01 14:29:03 +0000215}
216
Ron Madridf5675aa2009-02-18 14:30:44 -0800217#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassf8df9d02011-10-15 19:14:09 +0000218char NS16550_getc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000219{
Graeme Russ167cdad2010-04-24 00:05:46 +1000220 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
Marek Vasutf2041382012-09-15 10:25:19 +0200221#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
wdenk232c1502004-03-12 00:14:09 +0000222 extern void usbtty_poll(void);
223 usbtty_poll();
224#endif
Ladislav Michla1b322a2010-02-01 23:34:25 +0100225 WATCHDOG_RESET();
wdenk232c1502004-03-12 00:14:09 +0000226 }
Graeme Russ167cdad2010-04-24 00:05:46 +1000227 return serial_in(&com_port->rbr);
wdenke85390d2002-04-01 14:29:03 +0000228}
229
Simon Glassf8df9d02011-10-15 19:14:09 +0000230int NS16550_tstc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000231{
Simon Glassf8df9d02011-10-15 19:14:09 +0000232 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
wdenke85390d2002-04-01 14:29:03 +0000233}
234
Ron Madridf5675aa2009-02-18 14:30:44 -0800235#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
Simon Glass12e431b2014-09-04 16:27:34 -0600236
Simon Glass21d00432015-01-26 18:27:09 -0700237#ifdef CONFIG_DEBUG_UART_NS16550
238
239#include <debug_uart.h>
240
Simon Glass6e780c72015-06-23 15:39:06 -0600241#define serial_dout(reg, value) \
242 serial_out_shift((char *)com_port + \
243 ((char *)reg - (char *)com_port) * \
244 (1 << CONFIG_DEBUG_UART_SHIFT), \
245 CONFIG_DEBUG_UART_SHIFT, value)
246#define serial_din(reg) \
247 serial_in_shift((char *)com_port + \
248 ((char *)reg - (char *)com_port) * \
249 (1 << CONFIG_DEBUG_UART_SHIFT), \
250 CONFIG_DEBUG_UART_SHIFT)
251
Simon Glass97b05972015-10-18 19:51:23 -0600252static inline void _debug_uart_init(void)
Simon Glass21d00432015-01-26 18:27:09 -0700253{
254 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
255 int baud_divisor;
256
257 /*
258 * We copy the code from above because it is already horribly messy.
259 * Trying to refactor to nicely remove the duplication doesn't seem
260 * feasible. The better fix is to move all users of this driver to
261 * driver model.
262 */
Marek Vasut03c6f172016-05-25 02:13:16 +0200263 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
264 CONFIG_BAUDRATE);
Simon Glass6e780c72015-06-23 15:39:06 -0600265 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
266 serial_dout(&com_port->mcr, UART_MCRVAL);
267 serial_dout(&com_port->fcr, UART_FCRVAL);
Simon Glass21d00432015-01-26 18:27:09 -0700268
Simon Glass6e780c72015-06-23 15:39:06 -0600269 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
270 serial_dout(&com_port->dll, baud_divisor & 0xff);
271 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
272 serial_dout(&com_port->lcr, UART_LCRVAL);
Simon Glass21d00432015-01-26 18:27:09 -0700273}
274
275static inline void _debug_uart_putc(int ch)
276{
277 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
278
Simon Glass6e780c72015-06-23 15:39:06 -0600279 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
Simon Glass21d00432015-01-26 18:27:09 -0700280 ;
Simon Glass6e780c72015-06-23 15:39:06 -0600281 serial_dout(&com_port->thr, ch);
Simon Glass21d00432015-01-26 18:27:09 -0700282}
283
284DEBUG_UART_FUNCS
285
286#endif
287
Simon Glass12e431b2014-09-04 16:27:34 -0600288#ifdef CONFIG_DM_SERIAL
289static int ns16550_serial_putc(struct udevice *dev, const char ch)
290{
291 struct NS16550 *const com_port = dev_get_priv(dev);
292
293 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
294 return -EAGAIN;
295 serial_out(ch, &com_port->thr);
296
297 /*
298 * Call watchdog_reset() upon newline. This is done here in putc
299 * since the environment code uses a single puts() to print the complete
300 * environment upon "printenv". So we can't put this watchdog call
301 * in puts().
302 */
303 if (ch == '\n')
304 WATCHDOG_RESET();
305
306 return 0;
307}
308
309static int ns16550_serial_pending(struct udevice *dev, bool input)
310{
311 struct NS16550 *const com_port = dev_get_priv(dev);
312
313 if (input)
314 return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
315 else
316 return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
317}
318
319static int ns16550_serial_getc(struct udevice *dev)
320{
321 struct NS16550 *const com_port = dev_get_priv(dev);
322
Simon Glassaea2be22014-10-22 21:37:03 -0600323 if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
Simon Glass12e431b2014-09-04 16:27:34 -0600324 return -EAGAIN;
325
326 return serial_in(&com_port->rbr);
327}
328
329static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
330{
331 struct NS16550 *const com_port = dev_get_priv(dev);
332 struct ns16550_platdata *plat = com_port->plat;
333 int clock_divisor;
334
335 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
336
337 NS16550_setbrg(com_port, clock_divisor);
338
339 return 0;
340}
341
342int ns16550_serial_probe(struct udevice *dev)
343{
344 struct NS16550 *const com_port = dev_get_priv(dev);
345
Simon Glass11c1a872014-10-22 21:37:05 -0600346 com_port->plat = dev_get_platdata(dev);
Simon Glass12e431b2014-09-04 16:27:34 -0600347 NS16550_init(com_port, -1);
348
349 return 0;
350}
351
Simon Glassb2927fb2016-07-04 11:58:23 -0600352#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
Simon Glass12e431b2014-09-04 16:27:34 -0600353int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
354{
Simon Glass12e431b2014-09-04 16:27:34 -0600355 struct ns16550_platdata *plat = dev->platdata;
356 fdt_addr_t addr;
Tom Rini82f52792016-09-22 15:36:45 -0400357 __maybe_unused struct clk clk;
358 __maybe_unused int err;
Simon Glass12e431b2014-09-04 16:27:34 -0600359
Bin Meng3db886a2014-12-31 16:05:12 +0800360 /* try Processor Local Bus device first */
Simon Glass4e9838c2015-08-11 08:33:29 -0600361 addr = dev_get_addr(dev);
Simon Glassfcc0a872015-11-29 13:17:54 -0700362#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
Bin Meng3db886a2014-12-31 16:05:12 +0800363 if (addr == FDT_ADDR_T_NONE) {
364 /* then try pci device */
365 struct fdt_pci_addr pci_addr;
366 u32 bar;
367 int ret;
368
369 /* we prefer to use a memory-mapped register */
370 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
371 FDT_PCI_SPACE_MEM32, "reg",
372 &pci_addr);
373 if (ret) {
374 /* try if there is any i/o-mapped register */
375 ret = fdtdec_get_pci_addr(gd->fdt_blob,
376 dev->of_offset,
377 FDT_PCI_SPACE_IO,
378 "reg", &pci_addr);
379 if (ret)
380 return ret;
381 }
382
Simon Glassfcc0a872015-11-29 13:17:54 -0700383 ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
Bin Meng3db886a2014-12-31 16:05:12 +0800384 if (ret)
385 return ret;
386
387 addr = bar;
388 }
389#endif
390
Simon Glass12e431b2014-09-04 16:27:34 -0600391 if (addr == FDT_ADDR_T_NONE)
392 return -EINVAL;
393
Paul Burtondf8ec552016-05-17 07:43:26 +0100394#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glass167efe02014-10-22 21:37:04 -0600395 plat->base = addr;
Paul Burtondf8ec552016-05-17 07:43:26 +0100396#else
397 plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
398#endif
399
Michal Simek59b35dd2016-02-16 16:17:49 +0100400 plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
401 "reg-offset", 0);
Simon Glass12e431b2014-09-04 16:27:34 -0600402 plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
Thomas Chou80e06142015-11-29 14:01:03 +0800403 "reg-shift", 0);
Paul Burton50fce1d2016-09-08 07:47:29 +0100404
Tom Rini82f52792016-09-22 15:36:45 -0400405#ifdef CONFIG_CLK
Paul Burton50fce1d2016-09-08 07:47:29 +0100406 err = clk_get_by_index(dev, 0, &clk);
407 if (!err) {
408 err = clk_get_rate(&clk);
409 if (!IS_ERR_VALUE(err))
410 plat->clock = err;
411 } else if (err != -ENODEV && err != -ENOSYS) {
412 debug("ns16550 failed to get clock\n");
413 return err;
414 }
Tom Rini82f52792016-09-22 15:36:45 -0400415#endif
Paul Burton50fce1d2016-09-08 07:47:29 +0100416
417 if (!plat->clock)
418 plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
419 "clock-frequency",
420 CONFIG_SYS_NS16550_CLK);
Thomas Chou8e62d322015-11-19 21:48:05 +0800421 if (!plat->clock) {
422 debug("ns16550 clock not defined\n");
423 return -EINVAL;
424 }
Simon Glass12e431b2014-09-04 16:27:34 -0600425
426 return 0;
427}
Simon Glass11c1a872014-10-22 21:37:05 -0600428#endif
Simon Glass12e431b2014-09-04 16:27:34 -0600429
430const struct dm_serial_ops ns16550_serial_ops = {
431 .putc = ns16550_serial_putc,
432 .pending = ns16550_serial_pending,
433 .getc = ns16550_serial_getc,
434 .setbrg = ns16550_serial_setbrg,
435};
Thomas Chou8e62d322015-11-19 21:48:05 +0800436
Simon Glassb2927fb2016-07-04 11:58:23 -0600437#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Thomas Chou8e62d322015-11-19 21:48:05 +0800438#if CONFIG_IS_ENABLED(OF_CONTROL)
Thomas Choucc4228f2015-12-14 20:45:09 +0800439/*
440 * Please consider existing compatible strings before adding a new
441 * one to keep this table compact. Or you may add a generic "ns16550"
442 * compatible string to your dts.
443 */
Thomas Chou8e62d322015-11-19 21:48:05 +0800444static const struct udevice_id ns16550_serial_ids[] = {
445 { .compatible = "ns16550" },
446 { .compatible = "ns16550a" },
447 { .compatible = "nvidia,tegra20-uart" },
448 { .compatible = "snps,dw-apb-uart" },
449 { .compatible = "ti,omap2-uart" },
450 { .compatible = "ti,omap3-uart" },
451 { .compatible = "ti,omap4-uart" },
452 { .compatible = "ti,am3352-uart" },
453 { .compatible = "ti,am4372-uart" },
454 { .compatible = "ti,dra742-uart" },
455 {}
456};
457#endif
458
Simon Glassb7e29832015-12-13 21:36:59 -0700459#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
Thomas Chou8e62d322015-11-19 21:48:05 +0800460U_BOOT_DRIVER(ns16550_serial) = {
461 .name = "ns16550_serial",
462 .id = UCLASS_SERIAL,
463#if CONFIG_IS_ENABLED(OF_CONTROL)
464 .of_match = ns16550_serial_ids,
465 .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
466 .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
467#endif
468 .priv_auto_alloc_size = sizeof(struct NS16550),
469 .probe = ns16550_serial_probe,
470 .ops = &ns16550_serial_ops,
Simon Glassb7e5a642015-12-04 08:58:38 -0700471 .flags = DM_FLAG_PRE_RELOC,
Thomas Chou8e62d322015-11-19 21:48:05 +0800472};
Simon Glassb7e29832015-12-13 21:36:59 -0700473#endif
Simon Glassb2927fb2016-07-04 11:58:23 -0600474#endif /* !OF_PLATDATA */
Simon Glass12e431b2014-09-04 16:27:34 -0600475#endif /* CONFIG_DM_SERIAL */