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wdenke85390d2002-04-01 14:29:03 +00001/*
2 * COM1 NS16550 support
Stefan Roesea47a12b2010-04-15 16:07:28 +02003 * originally from linux source (arch/powerpc/boot/ns16550.c)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02004 * modified to use CONFIG_SYS_ISA_MEM and new defines
wdenke85390d2002-04-01 14:29:03 +00005 */
6
Simon Glassfa54eb12014-09-04 16:27:32 -06007#include <common.h>
Simon Glass12e431b2014-09-04 16:27:34 -06008#include <dm.h>
9#include <errno.h>
10#include <fdtdec.h>
wdenke85390d2002-04-01 14:29:03 +000011#include <ns16550.h>
Simon Glass12e431b2014-09-04 16:27:34 -060012#include <serial.h>
Ladislav Michla1b322a2010-02-01 23:34:25 +010013#include <watchdog.h>
Graeme Russ167cdad2010-04-24 00:05:46 +100014#include <linux/types.h>
15#include <asm/io.h>
wdenke85390d2002-04-01 14:29:03 +000016
Simon Glass12e431b2014-09-04 16:27:34 -060017DECLARE_GLOBAL_DATA_PTR;
18
Detlev Zundel200779e2009-04-03 11:53:01 +020019#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
20#define UART_MCRVAL (UART_MCR_DTR | \
21 UART_MCR_RTS) /* RTS/DTR */
22#define UART_FCRVAL (UART_FCR_FIFO_EN | \
23 UART_FCR_RXSR | \
24 UART_FCR_TXSR) /* Clear & enable FIFOs */
Simon Glass12e431b2014-09-04 16:27:34 -060025
26#ifndef CONFIG_DM_SERIAL
Graeme Russ167cdad2010-04-24 00:05:46 +100027#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glassf8df9d02011-10-15 19:14:09 +000028#define serial_out(x, y) outb(x, (ulong)y)
29#define serial_in(y) inb((ulong)y)
Dave Aldridge79df1202011-09-01 22:47:14 +000030#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
Simon Glassf8df9d02011-10-15 19:14:09 +000031#define serial_out(x, y) out_be32(y, x)
32#define serial_in(y) in_be32(y)
Dave Aldridge79df1202011-09-01 22:47:14 +000033#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
Simon Glassf8df9d02011-10-15 19:14:09 +000034#define serial_out(x, y) out_le32(y, x)
35#define serial_in(y) in_le32(y)
Graeme Russ167cdad2010-04-24 00:05:46 +100036#else
Simon Glassf8df9d02011-10-15 19:14:09 +000037#define serial_out(x, y) writeb(x, y)
38#define serial_in(y) readb(y)
Graeme Russ167cdad2010-04-24 00:05:46 +100039#endif
Simon Glass12e431b2014-09-04 16:27:34 -060040#endif /* !CONFIG_DM_SERIAL */
wdenke85390d2002-04-01 14:29:03 +000041
Khoronzhuk, Ivan7c387642014-07-16 00:59:25 +030042#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianovef509b92014-04-04 13:16:53 -040043#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
44#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -040045#undef UART_MCRVAL
46#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
47#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
48#else
49#define UART_MCRVAL (UART_MCR_RTS)
50#endif
Vitaly Andrianovef509b92014-04-04 13:16:53 -040051#endif
52
Prafulla Wadaskara160ea02010-10-27 21:58:31 +053053#ifndef CONFIG_SYS_NS16550_IER
54#define CONFIG_SYS_NS16550_IER 0x00
55#endif /* CONFIG_SYS_NS16550_IER */
56
Simon Glass12e431b2014-09-04 16:27:34 -060057#ifdef CONFIG_DM_SERIAL
Simon Glass76571672015-01-26 18:27:08 -070058
Thomas Chou8e62d322015-11-19 21:48:05 +080059#ifndef CONFIG_SYS_NS16550_CLK
60#define CONFIG_SYS_NS16550_CLK 0
61#endif
62
Simon Glass363e6da2015-02-27 22:06:26 -070063static inline void serial_out_shift(void *addr, int shift, int value)
Simon Glass76571672015-01-26 18:27:08 -070064{
65#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
66 outb(value, (ulong)addr);
67#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
68 out_le32(addr, value);
69#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
70 out_be32(addr, value);
Simon Glass90914002015-05-12 14:55:02 -060071#elif defined(CONFIG_SYS_NS16550_MEM32)
72 writel(value, addr);
Simon Glass76571672015-01-26 18:27:08 -070073#elif defined(CONFIG_SYS_BIG_ENDIAN)
74 writeb(value, addr + (1 << shift) - 1);
75#else
76 writeb(value, addr);
77#endif
78}
79
Simon Glass363e6da2015-02-27 22:06:26 -070080static inline int serial_in_shift(void *addr, int shift)
Simon Glass76571672015-01-26 18:27:08 -070081{
82#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
83 return inb((ulong)addr);
84#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
85 return in_le32(addr);
86#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
87 return in_be32(addr);
Simon Glass90914002015-05-12 14:55:02 -060088#elif defined(CONFIG_SYS_NS16550_MEM32)
89 return readl(addr);
Simon Glass76571672015-01-26 18:27:08 -070090#elif defined(CONFIG_SYS_BIG_ENDIAN)
Axel Lin20379c12015-02-28 15:55:36 +080091 return readb(addr + (1 << shift) - 1);
Simon Glass76571672015-01-26 18:27:08 -070092#else
93 return readb(addr);
94#endif
95}
96
Simon Glass12e431b2014-09-04 16:27:34 -060097static void ns16550_writeb(NS16550_t port, int offset, int value)
98{
99 struct ns16550_platdata *plat = port->plat;
100 unsigned char *addr;
101
102 offset *= 1 << plat->reg_shift;
Thomas Chou77d7b5c2015-11-19 21:48:04 +0800103 addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;
Simon Glass12e431b2014-09-04 16:27:34 -0600104 /*
105 * As far as we know it doesn't make sense to support selection of
106 * these options at run-time, so use the existing CONFIG options.
107 */
Simon Glass76571672015-01-26 18:27:08 -0700108 serial_out_shift(addr, plat->reg_shift, value);
Simon Glass12e431b2014-09-04 16:27:34 -0600109}
110
111static int ns16550_readb(NS16550_t port, int offset)
112{
113 struct ns16550_platdata *plat = port->plat;
114 unsigned char *addr;
115
116 offset *= 1 << plat->reg_shift;
Thomas Chou77d7b5c2015-11-19 21:48:04 +0800117 addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;
Simon Glass76571672015-01-26 18:27:08 -0700118
119 return serial_in_shift(addr, plat->reg_shift);
Simon Glass12e431b2014-09-04 16:27:34 -0600120}
121
122/* We can clean these up once everything is moved to driver model */
123#define serial_out(value, addr) \
Simon Glass363e6da2015-02-27 22:06:26 -0700124 ns16550_writeb(com_port, \
125 (unsigned char *)addr - (unsigned char *)com_port, value)
Simon Glass12e431b2014-09-04 16:27:34 -0600126#define serial_in(addr) \
Simon Glass363e6da2015-02-27 22:06:26 -0700127 ns16550_readb(com_port, \
128 (unsigned char *)addr - (unsigned char *)com_port)
Simon Glass12e431b2014-09-04 16:27:34 -0600129#endif
130
Simon Glass21d00432015-01-26 18:27:09 -0700131static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
Simon Glassfa54eb12014-09-04 16:27:32 -0600132{
133 const unsigned int mode_x_div = 16;
134
Simon Glass21d00432015-01-26 18:27:09 -0700135 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
136}
137
138int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
139{
Simon Glassfa54eb12014-09-04 16:27:32 -0600140#ifdef CONFIG_OMAP1510
141 /* If can't cleanly clock 115200 set div to 1 */
142 if ((clock == 12000000) && (baudrate == 115200)) {
143 port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
144 return 1; /* return 1 for base divisor */
145 }
146 port->osc_12m_sel = 0; /* clear if previsouly set */
147#endif
148
Simon Glass21d00432015-01-26 18:27:09 -0700149 return calc_divisor(port, clock, baudrate);
Simon Glassfa54eb12014-09-04 16:27:32 -0600150}
151
Simon Glass8bbe33c2014-09-04 16:27:33 -0600152static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
153{
154 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
155 serial_out(baud_divisor & 0xff, &com_port->dll);
156 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
157 serial_out(UART_LCRVAL, &com_port->lcr);
158}
159
Simon Glassf8df9d02011-10-15 19:14:09 +0000160void NS16550_init(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000161{
Gregoire Gentil956a8ba2014-11-10 11:04:10 -0800162#if (defined(CONFIG_SPL_BUILD) && \
163 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000164 /*
Gregoire Gentil956a8ba2014-11-10 11:04:10 -0800165 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
166 * before SPL starts only THRE bit is set. We have to empty the
167 * transmitter before initialization starts.
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000168 */
169 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
170 == UART_LSR_THRE) {
Simon Glass12e431b2014-09-04 16:27:34 -0600171 if (baud_divisor != -1)
172 NS16550_setbrg(com_port, baud_divisor);
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000173 serial_out(0, &com_port->mdr1);
174 }
175#endif
176
Scott Woodcb55b332012-09-18 18:19:05 -0500177 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
178 ;
179
Prafulla Wadaskara160ea02010-10-27 21:58:31 +0530180 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Tom Rini456ccfd2013-12-20 11:19:33 -0500181#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
182 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
Graeme Russ167cdad2010-04-24 00:05:46 +1000183 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
wdenk945af8d2003-07-16 21:53:01 +0000184#endif
Graeme Russ167cdad2010-04-24 00:05:46 +1000185 serial_out(UART_MCRVAL, &com_port->mcr);
186 serial_out(UART_FCRVAL, &com_port->fcr);
Simon Glass12e431b2014-09-04 16:27:34 -0600187 if (baud_divisor != -1)
188 NS16550_setbrg(com_port, baud_divisor);
Masahiro Yamada8ac22a62014-07-30 19:11:41 +0900189#if defined(CONFIG_OMAP) || \
Matt Porter6213a682013-03-15 10:07:09 +0000190 defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
TENART Antoine9ed6e412013-07-02 12:05:58 +0200191 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
Chandan Nath5289e832011-10-14 02:58:26 +0000192
Simon Glassf8df9d02011-10-15 19:14:09 +0000193 /* /16 is proper to hit 115200 with 48MHz */
194 serial_out(0, &com_port->mdr1);
Mike Frysingerb4746d82009-02-11 20:26:52 -0500195#endif /* CONFIG_OMAP */
Khoronzhuk, Ivan7c387642014-07-16 00:59:25 +0300196#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianovef509b92014-04-04 13:16:53 -0400197 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
198#endif
wdenke85390d2002-04-01 14:29:03 +0000199}
200
Ron Madridf5675aa2009-02-18 14:30:44 -0800201#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassf8df9d02011-10-15 19:14:09 +0000202void NS16550_reinit(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000203{
Prafulla Wadaskara160ea02010-10-27 21:58:31 +0530204 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600205 NS16550_setbrg(com_port, 0);
Graeme Russ167cdad2010-04-24 00:05:46 +1000206 serial_out(UART_MCRVAL, &com_port->mcr);
207 serial_out(UART_FCRVAL, &com_port->fcr);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600208 NS16550_setbrg(com_port, baud_divisor);
wdenke85390d2002-04-01 14:29:03 +0000209}
Ron Madridf5675aa2009-02-18 14:30:44 -0800210#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
wdenke85390d2002-04-01 14:29:03 +0000211
Simon Glassf8df9d02011-10-15 19:14:09 +0000212void NS16550_putc(NS16550_t com_port, char c)
wdenke85390d2002-04-01 14:29:03 +0000213{
Simon Glassf8df9d02011-10-15 19:14:09 +0000214 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
215 ;
Graeme Russ167cdad2010-04-24 00:05:46 +1000216 serial_out(c, &com_port->thr);
Stefan Roese1a2d9b32010-10-12 09:39:45 +0200217
218 /*
219 * Call watchdog_reset() upon newline. This is done here in putc
220 * since the environment code uses a single puts() to print the complete
221 * environment upon "printenv". So we can't put this watchdog call
222 * in puts().
223 */
224 if (c == '\n')
225 WATCHDOG_RESET();
wdenke85390d2002-04-01 14:29:03 +0000226}
227
Ron Madridf5675aa2009-02-18 14:30:44 -0800228#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassf8df9d02011-10-15 19:14:09 +0000229char NS16550_getc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000230{
Graeme Russ167cdad2010-04-24 00:05:46 +1000231 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
Marek Vasutf2041382012-09-15 10:25:19 +0200232#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
wdenk232c1502004-03-12 00:14:09 +0000233 extern void usbtty_poll(void);
234 usbtty_poll();
235#endif
Ladislav Michla1b322a2010-02-01 23:34:25 +0100236 WATCHDOG_RESET();
wdenk232c1502004-03-12 00:14:09 +0000237 }
Graeme Russ167cdad2010-04-24 00:05:46 +1000238 return serial_in(&com_port->rbr);
wdenke85390d2002-04-01 14:29:03 +0000239}
240
Simon Glassf8df9d02011-10-15 19:14:09 +0000241int NS16550_tstc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000242{
Simon Glassf8df9d02011-10-15 19:14:09 +0000243 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
wdenke85390d2002-04-01 14:29:03 +0000244}
245
Ron Madridf5675aa2009-02-18 14:30:44 -0800246#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
Simon Glass12e431b2014-09-04 16:27:34 -0600247
Simon Glass21d00432015-01-26 18:27:09 -0700248#ifdef CONFIG_DEBUG_UART_NS16550
249
250#include <debug_uart.h>
251
Simon Glass6e780c72015-06-23 15:39:06 -0600252#define serial_dout(reg, value) \
253 serial_out_shift((char *)com_port + \
254 ((char *)reg - (char *)com_port) * \
255 (1 << CONFIG_DEBUG_UART_SHIFT), \
256 CONFIG_DEBUG_UART_SHIFT, value)
257#define serial_din(reg) \
258 serial_in_shift((char *)com_port + \
259 ((char *)reg - (char *)com_port) * \
260 (1 << CONFIG_DEBUG_UART_SHIFT), \
261 CONFIG_DEBUG_UART_SHIFT)
262
Simon Glass97b05972015-10-18 19:51:23 -0600263static inline void _debug_uart_init(void)
Simon Glass21d00432015-01-26 18:27:09 -0700264{
265 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
266 int baud_divisor;
267
268 /*
269 * We copy the code from above because it is already horribly messy.
270 * Trying to refactor to nicely remove the duplication doesn't seem
271 * feasible. The better fix is to move all users of this driver to
272 * driver model.
273 */
274 baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
275 CONFIG_BAUDRATE);
Simon Glass6e780c72015-06-23 15:39:06 -0600276 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
277 serial_dout(&com_port->mcr, UART_MCRVAL);
278 serial_dout(&com_port->fcr, UART_FCRVAL);
Simon Glass21d00432015-01-26 18:27:09 -0700279
Simon Glass6e780c72015-06-23 15:39:06 -0600280 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
281 serial_dout(&com_port->dll, baud_divisor & 0xff);
282 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
283 serial_dout(&com_port->lcr, UART_LCRVAL);
Simon Glass21d00432015-01-26 18:27:09 -0700284}
285
286static inline void _debug_uart_putc(int ch)
287{
288 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
289
Simon Glass6e780c72015-06-23 15:39:06 -0600290 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
Simon Glass21d00432015-01-26 18:27:09 -0700291 ;
Simon Glass6e780c72015-06-23 15:39:06 -0600292 serial_dout(&com_port->thr, ch);
Simon Glass21d00432015-01-26 18:27:09 -0700293}
294
295DEBUG_UART_FUNCS
296
297#endif
298
Simon Glass12e431b2014-09-04 16:27:34 -0600299#ifdef CONFIG_DM_SERIAL
300static int ns16550_serial_putc(struct udevice *dev, const char ch)
301{
302 struct NS16550 *const com_port = dev_get_priv(dev);
303
304 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
305 return -EAGAIN;
306 serial_out(ch, &com_port->thr);
307
308 /*
309 * Call watchdog_reset() upon newline. This is done here in putc
310 * since the environment code uses a single puts() to print the complete
311 * environment upon "printenv". So we can't put this watchdog call
312 * in puts().
313 */
314 if (ch == '\n')
315 WATCHDOG_RESET();
316
317 return 0;
318}
319
320static int ns16550_serial_pending(struct udevice *dev, bool input)
321{
322 struct NS16550 *const com_port = dev_get_priv(dev);
323
324 if (input)
325 return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
326 else
327 return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
328}
329
330static int ns16550_serial_getc(struct udevice *dev)
331{
332 struct NS16550 *const com_port = dev_get_priv(dev);
333
Simon Glassaea2be22014-10-22 21:37:03 -0600334 if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
Simon Glass12e431b2014-09-04 16:27:34 -0600335 return -EAGAIN;
336
337 return serial_in(&com_port->rbr);
338}
339
340static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
341{
342 struct NS16550 *const com_port = dev_get_priv(dev);
343 struct ns16550_platdata *plat = com_port->plat;
344 int clock_divisor;
345
346 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
347
348 NS16550_setbrg(com_port, clock_divisor);
349
350 return 0;
351}
352
353int ns16550_serial_probe(struct udevice *dev)
354{
355 struct NS16550 *const com_port = dev_get_priv(dev);
356
Simon Glass11c1a872014-10-22 21:37:05 -0600357 com_port->plat = dev_get_platdata(dev);
Simon Glass12e431b2014-09-04 16:27:34 -0600358 NS16550_init(com_port, -1);
359
360 return 0;
361}
362
Masahiro Yamada0f925822015-08-12 07:31:55 +0900363#if CONFIG_IS_ENABLED(OF_CONTROL)
Simon Glass12e431b2014-09-04 16:27:34 -0600364int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
365{
Simon Glass12e431b2014-09-04 16:27:34 -0600366 struct ns16550_platdata *plat = dev->platdata;
367 fdt_addr_t addr;
368
Bin Meng3db886a2014-12-31 16:05:12 +0800369 /* try Processor Local Bus device first */
Simon Glass4e9838c2015-08-11 08:33:29 -0600370 addr = dev_get_addr(dev);
Bin Meng3db886a2014-12-31 16:05:12 +0800371#ifdef CONFIG_PCI
372 if (addr == FDT_ADDR_T_NONE) {
373 /* then try pci device */
374 struct fdt_pci_addr pci_addr;
375 u32 bar;
376 int ret;
377
378 /* we prefer to use a memory-mapped register */
379 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
380 FDT_PCI_SPACE_MEM32, "reg",
381 &pci_addr);
382 if (ret) {
383 /* try if there is any i/o-mapped register */
384 ret = fdtdec_get_pci_addr(gd->fdt_blob,
385 dev->of_offset,
386 FDT_PCI_SPACE_IO,
387 "reg", &pci_addr);
388 if (ret)
389 return ret;
390 }
391
392 ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset,
393 &pci_addr, &bar);
394 if (ret)
395 return ret;
396
397 addr = bar;
398 }
399#endif
400
Simon Glass12e431b2014-09-04 16:27:34 -0600401 if (addr == FDT_ADDR_T_NONE)
402 return -EINVAL;
403
Simon Glass167efe02014-10-22 21:37:04 -0600404 plat->base = addr;
Simon Glass12e431b2014-09-04 16:27:34 -0600405 plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
Thomas Chou80e06142015-11-29 14:01:03 +0800406 "reg-shift", 0);
Thomas Chou8e62d322015-11-19 21:48:05 +0800407 plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
408 "clock-frequency",
409 CONFIG_SYS_NS16550_CLK);
410 if (!plat->clock) {
411 debug("ns16550 clock not defined\n");
412 return -EINVAL;
413 }
Simon Glass12e431b2014-09-04 16:27:34 -0600414
415 return 0;
416}
Simon Glass11c1a872014-10-22 21:37:05 -0600417#endif
Simon Glass12e431b2014-09-04 16:27:34 -0600418
419const struct dm_serial_ops ns16550_serial_ops = {
420 .putc = ns16550_serial_putc,
421 .pending = ns16550_serial_pending,
422 .getc = ns16550_serial_getc,
423 .setbrg = ns16550_serial_setbrg,
424};
Thomas Chou8e62d322015-11-19 21:48:05 +0800425
Thomas Chou8e62d322015-11-19 21:48:05 +0800426#if CONFIG_IS_ENABLED(OF_CONTROL)
427static const struct udevice_id ns16550_serial_ids[] = {
428 { .compatible = "ns16550" },
429 { .compatible = "ns16550a" },
430 { .compatible = "nvidia,tegra20-uart" },
huang lina51dbeb2015-11-17 14:20:14 +0800431 { .compatible = "rockchip,rk3036-uart" },
Thomas Chou8e62d322015-11-19 21:48:05 +0800432 { .compatible = "snps,dw-apb-uart" },
433 { .compatible = "ti,omap2-uart" },
434 { .compatible = "ti,omap3-uart" },
435 { .compatible = "ti,omap4-uart" },
436 { .compatible = "ti,am3352-uart" },
437 { .compatible = "ti,am4372-uart" },
438 { .compatible = "ti,dra742-uart" },
439 {}
440};
441#endif
442
443U_BOOT_DRIVER(ns16550_serial) = {
444 .name = "ns16550_serial",
445 .id = UCLASS_SERIAL,
446#if CONFIG_IS_ENABLED(OF_CONTROL)
447 .of_match = ns16550_serial_ids,
448 .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
449 .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
450#endif
451 .priv_auto_alloc_size = sizeof(struct NS16550),
452 .probe = ns16550_serial_probe,
453 .ops = &ns16550_serial_ops,
Simon Glassb7e5a642015-12-04 08:58:38 -0700454 .flags = DM_FLAG_PRE_RELOC,
Thomas Chou8e62d322015-11-19 21:48:05 +0800455};
Simon Glass12e431b2014-09-04 16:27:34 -0600456#endif /* CONFIG_DM_SERIAL */