blob: e3af6cb54fe87b2263fb5a7cc4163946972181ba [file] [log] [blame]
Dirk Eibachaba27ac2013-06-26 16:04:26 +02001/*
2 * (C) Copyright 2013
3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <gdsys_fpga.h>
26
27#include <asm/io.h>
28
29int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
30{
31 out_le16(reg, data);
32
33 return 0;
34}
35
36int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data)
37{
38 *data = in_le16(reg);
39
40 return 0;
41}