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Ajay Kumar71e6ba42013-02-21 23:53:07 +00001Exynos Display port controller
2==============================
3
4Required properties:
5SOC specific:
6 compatible: should be "samsung,exynos5-dp"
7 reg: Base address of DP IP
8
9Optional properties:
10 samsung,h-res: X resolution of the panel
11 samsung,h-sync-width: hsync value
12 samsung,h-back-porch: left margin
13 samsung,h-front-porch right margin
14 samsung,v-res: Y resolution of the panel
15 samsung,v-sync-width: vsync value
16 samsung,v-back-porch: upper margin
17 samsung,v-front-porch: lower margin
18 samsung,v-sync-rate: refresh rate
19
20 samsung,lt-status: Link training status
21 0(DP_LT_NONE), 1(DP_LT_START), 2(DP_LT_CR), 3(DP_LT_ET),
22 4(DP_LT_FINISHED), 5(DP_LT_FAIL)
23
24 samsung,master-mode: 1 if you want to run DP as master, else 0
25 samsung,bist-mode: 1 to enable video bist mode, else 0
26 samsung,bist-pattern: bist mode pattern type
27 0(NO_PATTERN), 1(COLOR_RAMP), 2(BALCK_WHITE_V_LINES),
28 3(COLOR_SQUARE), 4(INVALID_PATTERN), 5(COLORBAR_32),
29 6(COLORBAR_64),7(WHITE_GRAY_BALCKBAR_32),
30 8(WHITE_GRAY_BALCKBAR_64),9(MOBILE_WHITEBAR_32),
31 10(MOBILE_WHITEBAR_64)
32 samsung,h-sync-polarity: Horizontal Sync polarity
Tom Rini65cc0e22022-11-16 13:10:41 -050033 CFG_SYS_LOW if defined, else CONFIG_SYS_HIGH
Ajay Kumar71e6ba42013-02-21 23:53:07 +000034 samsung,v-sync-polarity: Vertical Sync polarity
Tom Rini65cc0e22022-11-16 13:10:41 -050035 CFG_SYS_LOW if defined, else CONFIG_SYS_HIGH
Ajay Kumar71e6ba42013-02-21 23:53:07 +000036 samsung,interlaced: Progressive if 0, else Interlaced
37 samsung,color-space: input video data format
38 COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
39 samsung,dynamic-range: dynamic range for input video data
40 VESA = 0, CEA = 1
41 samsung,ycbcr-coeff: YCbCr co-efficients for input video
42 COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1
43 samsung,color-depth: number of bits per colour component
44 COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3
45
46Example:
47SOC specific part:
48 dp@145b0000 {
49 compatible = "samsung,exynos5-dp";
50 reg = <0x145b0000 0x1000>;
51 #address-cells = <1>;
52 #size-cells = <1>;
53 };
54
55Board(panel) specific part:
56 dp@145b0000 {
57 samsung,lt-status = <0>;
58
59 samsung,master-mode = <0>;
60 samsung,bist-mode = <0>;
61 samsung,bist-pattern = <0>;
62 samsung,h-sync-polarity = <0>;
63 samsung,v-sync-polarity = <0>;
64 samsung,interlaced = <0>;
65 samsung,color-space = <0>;
66 samsung,dynamic-range = <0>;
67 samsung,ycbcr-coeff = <0>;
68 samsung,color-depth = <1>;
69 };