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Nobuhiro Iwamatsu0d53a472008-08-31 22:45:08 +09001/*
2 * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu0d53a472008-08-31 22:45:08 +09005 */
6
7#include <common.h>
8#include <asm/io.h>
9#include <asm/processor.h>
10#include <asm/pci.h>
Yoshihiro Shimoda1d9b67b2008-09-09 17:52:47 +090011#include <netdev.h>
Nobuhiro Iwamatsu0d53a472008-08-31 22:45:08 +090012
13int checkboard(void)
14{
15 puts("BOARD: Renesas Technology Corp. R0P7785LC0011RL\n");
16 return 0;
17}
18
19int board_init(void)
20{
21 return 0;
22}
23
Nobuhiro Iwamatsu0d53a472008-08-31 22:45:08 +090024static struct pci_controller hose;
25void pci_init_board(void)
26{
27 pci_sh7780_init(&hose);
28}
29
Yoshihiro Shimoda1d9b67b2008-09-09 17:52:47 +090030int board_eth_init(bd_t *bis)
31{
32 return pci_eth_init(bis);
33}
Yoshihiro Shimodaada93182009-03-03 15:11:17 +090034
35#if defined(CONFIG_SH_32BIT)
Wolfgang Denk54841ab2010-06-28 22:00:46 +020036int do_pmb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
Yoshihiro Shimodaada93182009-03-03 15:11:17 +090037{
38 /* clear ITLB */
39 writel(0x00000004, 0xff000010);
40
41 /* delete PMB for peripheral */
42 writel(0, PMB_ADDR_BASE(0));
43 writel(0, PMB_DATA_BASE(0));
44 writel(0, PMB_ADDR_BASE(1));
45 writel(0, PMB_DATA_BASE(1));
46 writel(0, PMB_ADDR_BASE(2));
47 writel(0, PMB_DATA_BASE(2));
48
49 /* add PMB for SDRAM(0x40000000 - 0x47ffffff) */
50 writel(mk_pmb_addr_val(0x80), PMB_ADDR_BASE(8));
51 writel(mk_pmb_data_val(0x40, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(8));
52 writel(mk_pmb_addr_val(0xa0), PMB_ADDR_BASE(12));
53 writel(mk_pmb_data_val(0x40, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(12));
54
55 return 0;
56}
57
58U_BOOT_CMD(
59 pmb, 1, 1, do_pmb,
60 "pmb - PMB setting\n",
61 "\n"
Wolfgang Denka89c33d2009-05-24 17:06:54 +020062 " - PMB setting for all SDRAM mapping"
Yoshihiro Shimodaada93182009-03-03 15:11:17 +090063);
64#endif