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Prafulla Wadaskar54e999a2010-09-30 22:53:43 +05301/*
2 * (C) Copyright 2010
3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 */
24
25/*
26 * This file contains Marvell Board Specific common defincations.
27 * This file should be included in board config header file.
28 *
29 * It supports common definations for Kirkwood platform
30 * TBD: support for Orion5X platforms
31 */
32
33#ifndef _MV_COMMON_H
34#define _MV_COMMON_H
35
36/*
37 * High Level Configuration Options (easy to change)
38 */
39#define CONFIG_MARVELL 1
40#define CONFIG_ARM926EJS 1 /* Basic Architecture */
41
42#if defined(CONFIG_KIRKWOOD)
43#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
44#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
45#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
46#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */
47
Wolfgang Denk844f07d2010-11-27 23:30:56 +010048/*
Prafulla Wadaskar31d80c72010-10-27 17:46:06 +053049 * By default kwbimage.cfg from board specific folder is used
50 * If for some board, different configuration file need to be used,
51 * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file
52 */
53#ifndef CONFIG_SYS_KWD_CONFIG
Wolfgang Denk844f07d2010-11-27 23:30:56 +010054#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg
Prafulla Wadaskar31d80c72010-10-27 17:46:06 +053055#endif /* CONFIG_SYS_KWD_CONFIG */
56
Wolfgang Denk844f07d2010-11-27 23:30:56 +010057/*
Prafulla Wadaskar31d80c72010-10-27 17:46:06 +053058 * CONFIG_SYS_TEXT_BASE can be defined in board specific header file, if needed
59 */
60#ifndef CONFIG_SYS_TEXT_BASE
61#define CONFIG_SYS_TEXT_BASE 0x00600000
62#endif /* CONFIG_SYS_TEXT_BASE */
63
Prafulla Wadaskar54e999a2010-09-30 22:53:43 +053064#define CONFIG_I2C_MVTWSI_BASE KW_TWSI_BASE
65#define MV_UART0_BASE KW_UART0_BASE
66#define MV_SATA_BASE KW_SATA_BASE
67#define MV_SATA_PORT0_OFFSET KW_SATA_PORT0_OFFSET
68#define MV_SATA_PORT1_OFFSET KW_SATA_PORT1_OFFSET
69
70#else
71#error "Unsupported SoC"
72#endif
73
Prafulla Wadaskar0b20ed72010-09-30 22:57:02 +053074/* additions for new ARM relocation support */
75#define CONFIG_SYS_SDRAM_BASE 0x00000000
76/* Kirkwood has 2k of Security SRAM, use it for SP */
77#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000
78
Prafulla Wadaskar54e999a2010-09-30 22:53:43 +053079/*
80 * CLKs configurations
81 */
82#define CONFIG_SYS_HZ 1000
83
84/*
85 * NS16550 Configuration
86 */
87#define CONFIG_SYS_NS16550
88#define CONFIG_SYS_NS16550_SERIAL
89#define CONFIG_SYS_NS16550_REG_SIZE (-4)
90#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
91#define CONFIG_SYS_NS16550_COM1 MV_UART0_BASE
92
93/*
94 * Serial Port configuration
95 * The following definitions let you select what serial you want to use
96 * for your console driver.
97 */
98
99#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
100#define CONFIG_BAUDRATE 115200
101#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
102 115200,230400, 460800, 921600 }
103/* auto boot */
104#define CONFIG_BOOTDELAY 3 /* default enable autoboot */
105
106/*
107 * For booting Linux, the board info and command line data
108 * have to be in the first 8 MB of memory, since this is
109 * the maximum mapped by the Linux kernel during initialization.
110 */
111#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
112#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
113#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
114
115#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */
116#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
117#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
118 +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
119
120/*
121 * NAND configuration
122 */
123#ifdef CONFIG_CMD_NAND
124#define CONFIG_NAND_KIRKWOOD
125#define CONFIG_SYS_MAX_NAND_DEVICE 1
126#define NAND_MAX_CHIPS 1
127#define CONFIG_SYS_NAND_BASE 0xD8000000 /* MV_DEFADR_NANDF */
128#define NAND_ALLOW_ERASE_ALL 1
129#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
130#endif
131
132/*
133 * SPI Flash configuration
134 */
135#ifdef CONFIG_CMD_SF
136#define CONFIG_SPI_FLASH 1
137#define CONFIG_HARD_SPI 1
138#define CONFIG_KIRKWOOD_SPI 1
139#define CONFIG_SPI_FLASH_MACRONIX 1
140#define CONFIG_ENV_SPI_BUS 0
141#define CONFIG_ENV_SPI_CS 0
142#define CONFIG_ENV_SPI_MAX_HZ 50000000 /*50Mhz */
143#endif
144
145/*
146 * Size of malloc() pool
147 */
148#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* 1MiB for malloc() */
149/* size in bytes reserved for initial data */
Prafulla Wadaskar54e999a2010-09-30 22:53:43 +0530150
151/*
152 * Other required minimal configurations
153 */
154#define CONFIG_SYS_LONGHELP
155#define CONFIG_AUTO_COMPLETE
156#define CONFIG_CMDLINE_EDITING
157#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
158#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
159#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
Wolfgang Denk844f07d2010-11-27 23:30:56 +0100160#define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits */
Prafulla Wadaskar54e999a2010-09-30 22:53:43 +0530161#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
162#define CONFIG_NR_DRAM_BANKS 4
163#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
164#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
165#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
166#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
167#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
168#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
169
170/*
171 * Ethernet Driver configuration
172 */
173#ifdef CONFIG_CMD_NET
174#define CONFIG_CMD_MII
175#define CONFIG_NETCONSOLE /* include NetConsole support */
176#define CONFIG_NET_MULTI /* specify more that one ports available */
177#define CONFIG_MII /* expose smi ove miiphy interface */
178#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */
179#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
180#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
181#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */
182#endif /* CONFIG_CMD_NET */
183
184/*
185 * USB/EHCI
186 */
187#ifdef CONFIG_CMD_USB
188#define CONFIG_USB_EHCI /* Enable EHCI USB support */
189#define CONFIG_USB_EHCI_KIRKWOOD
190#define CONFIG_EHCI_IS_TDI
191#define CONFIG_USB_STORAGE
192#define CONFIG_DOS_PARTITION
193#define CONFIG_ISO_PARTITION
194#define CONFIG_SUPPORT_VFAT
195#endif /* CONFIG_CMD_USB */
196
197/*
198 * IDE Support on SATA ports
199 */
200#ifdef CONFIG_CMD_IDE
201#define __io
202#define CONFIG_CMD_EXT2
203#define CONFIG_MVSATA_IDE
204#define CONFIG_IDE_PREINIT
205#define CONFIG_MVSATA_IDE_USE_PORT1
206/* Needs byte-swapping for ATA data register */
207#define CONFIG_IDE_SWAP_IO
208/* Data, registers and alternate blocks are at the same offset */
209#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100)
210#define CONFIG_SYS_ATA_REG_OFFSET (0x0100)
211#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100)
212/* Each 8-bit ATA register is aligned to a 4-bytes address */
213#define CONFIG_SYS_ATA_STRIDE 4
214/* Controller supports 48-bits LBA addressing */
215#define CONFIG_LBA48
216/* CONFIG_CMD_IDE requires some #defines for ATA registers */
217#define CONFIG_SYS_IDE_MAXBUS 2
218#define CONFIG_SYS_IDE_MAXDEVICE 2
219/* ATA registers base is at SATA controller base */
220#define CONFIG_SYS_ATA_BASE_ADDR MV_SATA_BASE
221#endif /* CONFIG_CMD_IDE */
222
223/*
224 * I2C related stuff
225 */
226#ifdef CONFIG_CMD_I2C
227#define CONFIG_I2C_MVTWSI
228#define CONFIG_SYS_I2C_SLAVE 0x0
229#define CONFIG_SYS_I2C_SPEED 100000
230#endif
231
232/*
233 * File system
234 */
235#define CONFIG_CMD_EXT2
236#define CONFIG_CMD_JFFS2
237#define CONFIG_CMD_FAT
238#define CONFIG_CMD_UBI
239#define CONFIG_CMD_UBIFS
240#define CONFIG_RBTREE
241#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
242#define CONFIG_MTD_PARTITIONS
243#define CONFIG_CMD_MTDPARTS
244#define CONFIG_LZO
245
246#endif /* _MV_COMMON_H */