blob: e0c2aaff8262d38213cf60ba8f9143254512d0da [file] [log] [blame]
Wolfgang Denkad5bb452007-03-06 18:08:43 +01001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
26/*
27 * CPU test
28 * Integer compare instructions: cmpwi, cmplwi
29 *
30 * To verify these instructions the test runs them with
31 * different combinations of operands, reads the condition
32 * register value and compares it with the expected one.
33 * The test contains a pre-built table
34 * containing the description of each test case: the instruction,
35 * the values of the operands, the condition field to save
36 * the result in and the expected result.
37 */
38
39#ifdef CONFIG_POST
40
41#include <post.h>
42#include "cpu_asm.h"
43
44#if CONFIG_POST & CFG_POST_CPU
45
46extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1);
47
48static struct cpu_post_cmpi_s
49{
50 ulong cmd;
51 ulong op1;
52 ushort op2;
53 ulong cr;
54 ulong res;
55} cpu_post_cmpi_table[] =
56{
57 {
58 OP_CMPWI,
59 123,
60 123,
61 2,
62 0x02
63 },
64 {
65 OP_CMPWI,
66 123,
67 133,
68 3,
69 0x08
70 },
71 {
72 OP_CMPWI,
73 123,
74 -133,
75 4,
76 0x04
77 },
78 {
79 OP_CMPLWI,
80 123,
81 123,
82 2,
83 0x02
84 },
85 {
86 OP_CMPLWI,
87 123,
88 -133,
89 3,
90 0x08
91 },
92 {
93 OP_CMPLWI,
94 123,
95 113,
96 4,
97 0x04
98 },
99};
100static unsigned int cpu_post_cmpi_size =
101 sizeof (cpu_post_cmpi_table) / sizeof (struct cpu_post_cmpi_s);
102
103int cpu_post_test_cmpi (void)
104{
105 int ret = 0;
106 unsigned int i;
107
108 for (i = 0; i < cpu_post_cmpi_size && ret == 0; i++)
109 {
110 struct cpu_post_cmpi_s *test = cpu_post_cmpi_table + i;
111 unsigned long code[] =
112 {
113 ASM_1IC(test->cmd, test->cr, 3, test->op2),
114 ASM_MFCR(3),
115 ASM_BLR
116 };
117 ulong res;
118
119 cpu_post_exec_11 (code, & res, test->op1);
120
121 ret = ((res >> (28 - 4 * test->cr)) & 0xe) == test->res ? 0 : -1;
122
123 if (ret != 0)
124 {
125 post_log ("Error at cmpi test %d !\n", i);
126 }
127 }
128
129 return ret;
130}
131
132#endif
133#endif