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Stelian Popd99a8ff2008-05-08 20:52:22 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9261EK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* ARM asynchronous clock */
Stelian Pop820f2a92008-05-08 14:52:30 +020031#define AT91_CPU_NAME "AT91SAM9261"
Stelian Popd99a8ff2008-05-08 20:52:22 +020032#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */
33#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */
34#define CFG_HZ 1000000 /* 1us resolution */
35
36#define AT91_SLOW_CLOCK 32768 /* slow clock */
37
38#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
39#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/
40#define CONFIG_AT91SAM9261EK 1 /* on an AT91SAM9261EK Board */
41#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
42
43#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
44#define CONFIG_SETUP_MEMORY_TAGS 1
45#define CONFIG_INITRD_TAG 1
46
47#define CONFIG_SKIP_LOWLEVEL_INIT
48#define CONFIG_SKIP_RELOCATE_UBOOT
49
50/*
51 * Hardware drivers
52 */
53#define CONFIG_ATMEL_USART 1
54#undef CONFIG_USART0
55#undef CONFIG_USART1
56#undef CONFIG_USART2
57#define CONFIG_USART3 1 /* USART 3 is DBGU */
58
Stelian Pop820f2a92008-05-08 14:52:30 +020059/* LCD */
60#define CONFIG_LCD 1
61#define LCD_BPP LCD_COLOR8
62#define CONFIG_LCD_LOGO 1
63#undef LCD_TEST_PATTERN
64#define CONFIG_LCD_INFO 1
65#define CONFIG_LCD_INFO_BELOW_LOGO 1
66#define CFG_WHITE_ON_BLACK 1
67#define CONFIG_ATMEL_LCD 1
68#define CONFIG_ATMEL_LCD_BGR555 1
69#define CFG_CONSOLE_IS_IN_ENV 1
70
Stelian Popd99a8ff2008-05-08 20:52:22 +020071#define CONFIG_BOOTDELAY 3
72
Stelian Popd99a8ff2008-05-08 20:52:22 +020073/*
74 * BOOTP options
75 */
76#define CONFIG_BOOTP_BOOTFILESIZE 1
77#define CONFIG_BOOTP_BOOTPATH 1
78#define CONFIG_BOOTP_GATEWAY 1
79#define CONFIG_BOOTP_HOSTNAME 1
80
81/*
82 * Command line configuration.
83 */
84#include <config_cmd_default.h>
85#undef CONFIG_CMD_BDI
86#undef CONFIG_CMD_IMI
87#undef CONFIG_CMD_AUTOSCRIPT
88#undef CONFIG_CMD_FPGA
89#undef CONFIG_CMD_LOADS
90#undef CONFIG_CMD_IMLS
91
92#define CONFIG_CMD_PING 1
93#define CONFIG_CMD_DHCP 1
94#define CONFIG_CMD_NAND 1
95#define CONFIG_CMD_USB 1
96
97/* SDRAM */
98#define CONFIG_NR_DRAM_BANKS 1
99#define PHYS_SDRAM 0x20000000
100#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
101
102/* DataFlash */
103#define CONFIG_HAS_DATAFLASH 1
104#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
105#define CFG_MAX_DATAFLASH_BANKS 2
106#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
107#define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
108#define AT91_SPI_CLK 15000000
109#define DATAFLASH_TCSS (0x1a << 16)
110#define DATAFLASH_TCHS (0x1 << 24)
111
112/* NAND flash */
113#define NAND_MAX_CHIPS 1
114#define CFG_MAX_NAND_DEVICE 1
115#define CFG_NAND_BASE 0x40000000
116#define CFG_NAND_DBW_8 1
117
118/* NOR flash - no real flash on this board */
119#define CFG_NO_FLASH 1
120
121/* Ethernet */
122#define CONFIG_DRIVER_DM9000 1
123#define CONFIG_DM9000_BASE 0x30000000
124#define DM9000_IO CONFIG_DM9000_BASE
125#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
126#define CONFIG_DM9000_USE_16BIT 1
127#define CONFIG_NET_RETRY_COUNT 20
128#define CONFIG_RESET_PHY_R 1
129
130/* USB */
131#define CONFIG_USB_OHCI_NEW 1
132#define LITTLEENDIAN 1
133#define CONFIG_DOS_PARTITION 1
134#define CFG_USB_OHCI_CPU_INIT 1
135#define CFG_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
136#define CFG_USB_OHCI_SLOT_NAME "at91sam9261"
137#define CFG_USB_OHCI_MAX_ROOT_PORTS 2
138#define CONFIG_USB_STORAGE 1
139
140#define CFG_LOAD_ADDR 0x22000000 /* load address */
141
142#define CFG_MEMTEST_START PHYS_SDRAM
143#define CFG_MEMTEST_END 0x23e00000
144
145#define CFG_USE_DATAFLASH_CS0 1
146#undef CFG_USE_NANDFLASH
147
148#ifdef CFG_USE_DATAFLASH_CS0
149
150/* bootstrap + u-boot + env + linux in dataflash on CS0 */
151#define CFG_ENV_IS_IN_DATAFLASH 1
152#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
153#define CFG_ENV_OFFSET 0x4200
154#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
155#define CFG_ENV_SIZE 0x4200
156#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
157#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
158 "root=/dev/mtdblock0 " \
159 "mtdparts=at91_nand:-(root) " \
160 "rw rootfstype=jffs2"
161
162#else /* CFG_USE_NANDFLASH */
163
164/* bootstrap + u-boot + env + linux in nandflash */
165#define CFG_ENV_IS_IN_NAND 1
166#define CFG_ENV_OFFSET 0x60000
167#define CFG_ENV_OFFSET_REDUND 0x80000
168#define CFG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
169#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
170#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
171 "root=/dev/mtdblock5 " \
172 "mtdparts=at91_nand:128k(bootstrap)ro," \
173 "256k(uboot)ro,128k(env1)ro," \
174 "128k(env2)ro,2M(linux),-(root) " \
175 "rw rootfstype=jffs2"
176
177#endif
178
179#define CONFIG_BAUDRATE 115200
180#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
181
182#define CFG_PROMPT "U-Boot> "
183#define CFG_CBSIZE 256
184#define CFG_MAXARGS 16
185#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
186#define CFG_LONGHELP 1
187#define CONFIG_CMDLINE_EDITING 1
188
189#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
190/*
191 * Size of malloc() pool
192 */
193#define CFG_MALLOC_LEN ROUND(3 * CFG_ENV_SIZE + 128*1024, 0x1000)
194#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
195
196#define CONFIG_STACKSIZE (32*1024) /* regular stack */
197
198#ifdef CONFIG_USE_IRQ
199#error CONFIG_USE_IRQ not supported
200#endif
201
202#endif