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wdenka562e1b2005-01-09 18:21:42 +00001/*
2 * Configuation settings for the Sentec Cobra Board.
3 *
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25/* ---
26 * Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board
27 * Date: 2004-03-29
28 * Author: Florian Schlote
29 *
30 * For a description of configuration options please refer also to the
31 * general u-boot-1.x.x/README file
32 * ---
33 */
34
35/* ---
36 * board/config.h - configuration options, board specific
37 * ---
38 */
39
40#ifndef _CONFIG_COBRA5272_H
41#define _CONFIG_COBRA5272_H
42
43/* ---
44 * Define processor
45 * possible values for Sentec board: only Coldfire M5272 processor supported
46 * (please do not change)
47 * ---
48 */
49
50#define CONFIG_MCF52x2 /* define processor family */
51#define CONFIG_M5272 /* define processor type */
52
53/* ---
54 * Defines processor clock - important for correct timings concerning serial
55 * interface etc.
56 * CFG_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
57 * ---
58 */
59
60#define CFG_HZ 1000
61#define CFG_CLK 66000000
62#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
63
64/* ---
65 * Enable use of Ethernet
66 * ---
67 */
TsiChungLiew67064242007-08-15 19:41:06 -050068#define CONFIG_MCFFEC
wdenka562e1b2005-01-09 18:21:42 +000069
TsiChungLiew67064242007-08-15 19:41:06 -050070/* Enable Dma Timer */
71#define CONFIG_MCFTMR
wdenka562e1b2005-01-09 18:21:42 +000072
73/* ---
74 * Define baudrate for UART1 (console output, tftp, ...)
75 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
76 * CFG_BAUDRATE_TABLE defines values that can be selected in u-boot command
77 * interface
78 * ---
79 */
80
TsiChungLiew67064242007-08-15 19:41:06 -050081#define CONFIG_MCFUART
82#define CFG_UART_PORT (0)
wdenka562e1b2005-01-09 18:21:42 +000083#define CONFIG_BAUDRATE 19200
84#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
85
86/* ---
87 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
88 * timeout acc. to your needs
89 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
90 * for 10 sec
91 * ---
92 */
93
94#if 0
95#define CONFIG_WATCHDOG
96#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
97#endif
98
99/* ---
100 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
101 * bootloader residing in flash ('chainloading'); if you want to use
102 * chainloading or want to compile a u-boot binary that can be loaded into
103 * RAM via BDM set
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200104 * "#if 0" to "#if 1"
wdenka562e1b2005-01-09 18:21:42 +0000105 * You will need a first stage bootloader then, e. g. colilo or a working BDM
106 * cable (Background Debug Mode)
107 *
108 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
109 *
110 * Please do not forget to modify the setting of TEXT_BASE
111 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
112 *
113 * ---
114 */
115
116#if 0
117#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
118#endif
119
120/* ---
121 * Configuration for environment
122 * Environment is embedded in u-boot in the second sector of the flash
123 * ---
124 */
125
126#ifndef CONFIG_MONITOR_IS_IN_RAM
127#define CFG_ENV_OFFSET 0x4000
128#define CFG_ENV_SECT_SIZE 0x2000
129#define CFG_ENV_IS_IN_FLASH 1
130#define CFG_ENV_IS_EMBEDDED 1
131#else
132#define CFG_ENV_ADDR 0xffe04000
133#define CFG_ENV_SECT_SIZE 0x2000
134#define CFG_ENV_IS_IN_FLASH 1
135#endif
136
Jon Loeliger37e4f242007-07-04 22:31:56 -0500137
138/*
Jon Loeliger80ff4f92007-07-10 09:29:01 -0500139 * BOOTP options
140 */
141#define CONFIG_BOOTP_BOOTFILESIZE
142#define CONFIG_BOOTP_BOOTPATH
143#define CONFIG_BOOTP_GATEWAY
144#define CONFIG_BOOTP_HOSTNAME
145
146
147/*
Jon Loeliger37e4f242007-07-04 22:31:56 -0500148 * Command line configuration.
wdenka562e1b2005-01-09 18:21:42 +0000149 */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500150#include <config_cmd_default.h>
wdenka562e1b2005-01-09 18:21:42 +0000151
Jon Loeliger37e4f242007-07-04 22:31:56 -0500152#define CONFIG_CMD_PING
wdenka562e1b2005-01-09 18:21:42 +0000153
Jon Loeliger37e4f242007-07-04 22:31:56 -0500154#undef CONFIG_CMD_LOADS
155#undef CONFIG_CMD_LOADB
156#undef CONFIG_CMD_MII
157
TsiChungLiew67064242007-08-15 19:41:06 -0500158#ifdef CONFIG_MCFFEC
159# define CONFIG_NET_MULTI 1
160# define CONFIG_MII 1
TsiChung Liew0f3ba7e2008-03-30 01:22:13 -0500161# define CONFIG_MII_INIT 1
TsiChungLiew67064242007-08-15 19:41:06 -0500162# define CFG_DISCOVER_PHY
163# define CFG_RX_ETH_BUFFER 8
164# define CFG_FAULT_ECHO_LINK_DOWN
165
166# define CFG_FEC0_PINMUX 0
167# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200168# define MCFFEC_TOUT_LOOP 50000
TsiChungLiew67064242007-08-15 19:41:06 -0500169/* If CFG_DISCOVER_PHY is not defined - hardcoded */
170# ifndef CFG_DISCOVER_PHY
171# define FECDUPLEX FULL
172# define FECSPEED _100BASET
173# else
174# ifndef CFG_FAULT_ECHO_LINK_DOWN
175# define CFG_FAULT_ECHO_LINK_DOWN
176# endif
177# endif /* CFG_DISCOVER_PHY */
178#endif
wdenka562e1b2005-01-09 18:21:42 +0000179
180/*
181 *-----------------------------------------------------------------------------
182 * Define user parameters that have to be customized most likely
183 *-----------------------------------------------------------------------------
184 */
185
186/*AUTOBOOT settings - booting images automatically by u-boot after power on*/
187
188#define CONFIG_BOOTDELAY 5 /* used for autoboot, delay in
189seconds u-boot will wait before starting defined (auto-)boot command, setting
190to -1 disables delay, setting to 0 will too prevent access to u-boot command
191interface: u-boot then has to reflashed */
192
193
194/* The following settings will be contained in the environment block ; if you
195want to use a neutral environment all those settings can be manually set in
196u-boot: 'set' command */
197
198#if 0
199
200#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
201enter a valid image address in flash */
202
203#define CONFIG_BOOTARGS " " /* default bootargs that are
204considered during boot */
205
206/* User network settings */
207
208#define CONFIG_ETHADDR 00:00:00:00:00:09 /* default ethernet MAC addr. */
209#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
210#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
211
212#endif
213
214#define CFG_PROMPT "COBRA > " /* Layout of u-boot prompt*/
215
216#define CFG_LOAD_ADDR 0x20000 /*Defines default RAM address
217from which user programs will be started */
218
219/*---*/
220
221#define CFG_LONGHELP /* undef to save memory */
222
Jon Loeliger37e4f242007-07-04 22:31:56 -0500223#if defined(CONFIG_CMD_KGDB)
wdenka562e1b2005-01-09 18:21:42 +0000224#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
225#else
226#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
227#endif
228#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
229#define CFG_MAXARGS 16 /* max number of command args */
230#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
231
232/*
233 *-----------------------------------------------------------------------------
234 * End of user parameters to be customized
235 *-----------------------------------------------------------------------------
236 */
237
238/* ---
239 * Defines memory range for test
240 * ---
241 */
242
243#define CFG_MEMTEST_START 0x400
244#define CFG_MEMTEST_END 0x380000
245
246/* ---
247 * Low Level Configuration Settings
248 * (address mappings, register initial values, etc.)
249 * You should know what you are doing if you make changes here.
250 * ---
251 */
252
253/* ---
254 * Base register address
255 * ---
256 */
257
258#define CFG_MBAR 0x10000000 /* Register Base Addrs */
259
260/* ---
261 * System Conf. Reg. & System Protection Reg.
262 * ---
263 */
264
265#define CFG_SCR 0x0003;
266#define CFG_SPR 0xffff;
267
268/* ---
269 * Ethernet settings
270 * ---
271 */
272
273#define CFG_DISCOVER_PHY
274#define CFG_ENET_BD_BASE 0x780000
275
276/*-----------------------------------------------------------------------
277 * Definitions for initial stack pointer and data area (in internal SRAM)
278 */
279#define CFG_INIT_RAM_ADDR 0x20000000
280#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
281#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
282#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
283#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
284
285/*-----------------------------------------------------------------------
286 * Start addresses for the final memory configuration
287 * (Set up by the startup code)
288 * Please note that CFG_SDRAM_BASE _must_ start at 0
289 */
290#define CFG_SDRAM_BASE 0x00000000
291
292/*
293 *-------------------------------------------------------------------------
294 * RAM SIZE (is defined above)
295 *-----------------------------------------------------------------------
296 */
297
298/* #define CFG_SDRAM_SIZE 16 */
299
300/*
301 *-----------------------------------------------------------------------
302 */
303
304#define CFG_FLASH_BASE 0xffe00000
305
306#ifdef CONFIG_MONITOR_IS_IN_RAM
307#define CFG_MONITOR_BASE 0x20000
308#else
309#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
310#endif
311
312#define CFG_MONITOR_LEN 0x20000
313#define CFG_MALLOC_LEN (256 << 10)
314#define CFG_BOOTPARAMS_LEN 64*1024
315
316/*
317 * For booting Linux, the board info and command line data
318 * have to be in the first 8 MB of memory, since this is
319 * the maximum mapped by the Linux kernel during initialization ??
320 */
321#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
322
323/*-----------------------------------------------------------------------
324 * FLASH organization
325 */
326#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
327#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
328#define CFG_FLASH_ERASE_TOUT 1000 /* flash timeout */
329
330/*-----------------------------------------------------------------------
331 * Cache Configuration
332 */
333#define CFG_CACHELINE_SIZE 16
334
335/*-----------------------------------------------------------------------
336 * Memory bank definitions
337 *
338 * Please refer also to Motorola Coldfire user manual - Chapter XXX
339 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
340 */
341#define CFG_BR0_PRELIM 0xFFE00201
342#define CFG_OR0_PRELIM 0xFFE00014
343
344#define CFG_BR1_PRELIM 0
345#define CFG_OR1_PRELIM 0
346
347#define CFG_BR2_PRELIM 0
348#define CFG_OR2_PRELIM 0
349
350#define CFG_BR3_PRELIM 0
351#define CFG_OR3_PRELIM 0
352
353#define CFG_BR4_PRELIM 0
354#define CFG_OR4_PRELIM 0
355
356#define CFG_BR5_PRELIM 0
357#define CFG_OR5_PRELIM 0
358
359#define CFG_BR6_PRELIM 0
360#define CFG_OR6_PRELIM 0
361
362#define CFG_BR7_PRELIM 0x00000701
363#define CFG_OR7_PRELIM 0xFF00007C
364
365/*-----------------------------------------------------------------------
366 * LED config
367 */
368#define LED_STAT_0 0xffff /*all LEDs off*/
369#define LED_STAT_1 0xfffe
370#define LED_STAT_2 0xfffd
371#define LED_STAT_3 0xfffb
372#define LED_STAT_4 0xfff7
373#define LED_STAT_5 0xffef
374#define LED_STAT_6 0xffdf
375#define LED_STAT_7 0xff00 /*all LEDs on*/
376
377/*-----------------------------------------------------------------------
378 * Port configuration (GPIO)
379 */
380#define CFG_PACNT 0x00000000 /* PortA control reg.: All pins are external
381GPIO*/
382#define CFG_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
383(1^=output, 0^=input) */
384#define CFG_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
385#define CFG_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
386configuration */
387#define CFG_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
388#define CFG_PBDAT 0x0000 /* PortB value reg. */
389#define CFG_PDCNT 0x00000000 /* PortD control reg. */
390
391#endif /* _CONFIG_COBRA5272_H */