blob: 1ee92406b74cdfdba9fae7f26102d1cffc50671f [file] [log] [blame]
Pali Rohár0934ddd2022-02-14 11:34:30 +01001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
Stefan Roese850db822016-05-17 14:03:25 +02002/*
3 * Device Tree file for Marvell Armada 3720 development board
4 * (DB-88F3720-DDR3)
5 * Copyright (C) 2016 Marvell
6 *
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 *
Pali Rohár0934ddd2022-02-14 11:34:30 +01009 * This file is compatible with the version 1.4 and the version 2.0 of
10 * the board, however the CON numbers are different between the 2
11 * version
Stefan Roese850db822016-05-17 14:03:25 +020012 */
13
14/dts-v1/;
15
Pali Rohár0934ddd2022-02-14 11:34:30 +010016#include <dt-bindings/gpio/gpio.h>
Stefan Roese850db822016-05-17 14:03:25 +020017#include "armada-372x.dtsi"
18
19/ {
20 model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";
21 compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
Pali Rohár0934ddd2022-02-14 11:34:30 +010027 memory@0 {
Stefan Roese850db822016-05-17 14:03:25 +020028 device_type = "memory";
29 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
30 };
Stefan Roese850db822016-05-17 14:03:25 +020031
Pali Rohár0934ddd2022-02-14 11:34:30 +010032 exp_usb3_vbus: usb3-vbus {
33 compatible = "regulator-fixed";
34 regulator-name = "usb3-vbus";
35 regulator-min-microvolt = <5000000>;
36 regulator-max-microvolt = <5000000>;
37 enable-active-high;
38 regulator-always-on;
39 gpio = <&gpio_exp 1 GPIO_ACTIVE_HIGH>;
Stefan Roese56d53952016-08-26 13:10:45 +020040 };
41
Pali Rohár0934ddd2022-02-14 11:34:30 +010042 usb3_phy: usb3-phy {
43 compatible = "usb-nop-xceiv";
44 vcc-supply = <&exp_usb3_vbus>;
45 };
46
47 vcc_sd_reg1: regulator {
48 compatible = "regulator-gpio";
49 regulator-name = "vcc_sd1";
50 regulator-min-microvolt = <1800000>;
51 regulator-max-microvolt = <3300000>;
52 regulator-boot-on;
53
54 gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>;
55 gpios-states = <0>;
56 states = <1800000 0x1
57 3300000 0x0>;
58 enable-active-high;
59 };
60
61 vcc_sd_reg2: regulator-vmcc {
62 compatible = "regulator-fixed";
63 regulator-name = "vcc_sd2";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
66 regulator-boot-on;
67 enable-active-high;
68 gpio = <&gpio_exp 4 GPIO_ACTIVE_HIGH>;
Stefan Roese56d53952016-08-26 13:10:45 +020069 };
70};
71
Pali Rohár0934ddd2022-02-14 11:34:30 +010072/* Gigabit module on CON19(V2.0)/CON21(V1.4) */
Stefan Roese3f84e2e2016-05-19 17:45:20 +020073&eth0 {
Gregory CLEMENT045504b2017-05-09 13:35:22 +020074 pinctrl-names = "default";
Pali Rohár0934ddd2022-02-14 11:34:30 +010075 pinctrl-0 = <&rgmii_pins>;
76 phy-mode = "rgmii-id";
77 phy = <&phy0>;
Stefan Roese3f84e2e2016-05-19 17:45:20 +020078 status = "okay";
Pali Rohár0934ddd2022-02-14 11:34:30 +010079};
80
81/* Gigabit module on CON18(V2.0)/CON20(V1.4) */
82&eth1 {
83 phy-mode = "sgmii";
84 phy = <&phy1>;
85 status = "okay";
Stefan Roese3f84e2e2016-05-19 17:45:20 +020086};
87
Stefan Roese9e9e63c2016-07-21 11:34:32 +020088&i2c0 {
Gregory CLEMENT045504b2017-05-09 13:35:22 +020089 pinctrl-names = "default";
90 pinctrl-0 = <&i2c1_pins>;
Stefan Roese9e9e63c2016-07-21 11:34:32 +020091 status = "okay";
Pali Rohár0934ddd2022-02-14 11:34:30 +010092
93 gpio_exp: pca9555@22 {
94 compatible = "nxp,pca9555";
95 gpio-controller;
96 #gpio-cells = <2>;
97
98 reg = <0x22>;
99 /*
100 * IO0_0: PWR_EN_USB2 IO1_0: PWR_EN_VTT
101 * IO0_1: PWR_EN_USB23 IO1_1: MPCIE_WDISABLE
102 * IO0_2: PWR_EN_SATA IO1_2: RGMII_DEV_RSTN
103 * IO0_3: PWR_EN_PCIE IO1_3: SGMII_DEV_RSTN
104 * IO0_4: PWR_EN_SD
105 * IO0_5: PWR_EN_EMMC
106 * IO0_6: PWR_EN_RGMII IO1_6: SATA_USB3.0_SEL
107 * IO0_7: PWR_EN_SGMII IO1_7: PWR_MCI_PS
108 */
109 };
110
111 rtc@68 {
112 /* PT7C4337A from pericom fully compatible with the ds1337 */
113 compatible = "dallas,ds1337";
114 reg = <0x68>;
115 };
116};
117
118&mdio {
119 status = "okay";
120 phy0: ethernet-phy@0 {
121 reg = <0>;
122 };
123
124 phy1: ethernet-phy@1 {
125 reg = <1>;
126 };
127};
128
129/* CON15(V2.0)/CON17(V1.4) : PCIe / CON15(V2.0)/CON12(V1.4) :mini-PCIe */
130&pcie0 {
131 pinctrl-names = "default";
132 pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
133 reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
134 status = "okay";
Stefan Roese9e9e63c2016-07-21 11:34:32 +0200135};
136
Stefan Roese850db822016-05-17 14:03:25 +0200137/* CON3 */
138&sata {
139 status = "okay";
140};
141
Pali Rohár9dde7a02022-02-14 11:34:27 +0100142&sdhci0 {
Stefan Roese22074fc2016-12-09 15:12:07 +0100143 non-removable;
144 bus-width = <8>;
145 mmc-ddr-1_8v;
146 mmc-hs400-1_8v;
147 marvell,pad-type = "fixed-1-8v";
148 status = "okay";
Pali Rohár0934ddd2022-02-14 11:34:30 +0100149};
Stefan Roese22074fc2016-12-09 15:12:07 +0100150
Pali Rohár0934ddd2022-02-14 11:34:30 +0100151/* SD slot module on CON14(V2.0)/CON15(V1.4) */
152&sdhci1 {
153 wp-inverted;
154 cd-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
155 bus-width = <4>;
156 marvell,pad-type = "sd";
157 vqmmc-supply = <&vcc_sd_reg1>;
158 vmmc-supply = <&vcc_sd_reg2>;
159 status = "okay";
Stefan Roese22074fc2016-12-09 15:12:07 +0100160};
161
Stefan Roesecdccf9c2016-05-19 10:41:01 +0200162&spi0 {
163 status = "okay";
Gregory CLEMENT045504b2017-05-09 13:35:22 +0200164 pinctrl-names = "default";
165 pinctrl-0 = <&spi_quad_pins>;
Stefan Roesecdccf9c2016-05-19 10:41:01 +0200166
Pali Rohár0934ddd2022-02-14 11:34:30 +0100167 m25p80@0 {
168 compatible = "jedec,spi-nor";
169 reg = <0>;
170 spi-max-frequency = <108000000>;
171 spi-rx-bus-width = <4>;
172 spi-tx-bus-width = <4>;
173
174 partitions {
175 compatible = "fixed-partitions";
176 #address-cells = <1>;
177 #size-cells = <1>;
178 partition@0 {
179 label = "bootloader";
180 reg = <0x0 0x200000>;
181 };
182 partition@200000 {
Michal Simekbb922ca2023-06-05 13:58:59 +0200183 label = "U-Boot Env";
Pali Rohár0934ddd2022-02-14 11:34:30 +0100184 reg = <0x200000 0x10000>;
185 };
186 partition@210000 {
187 label = "Linux";
188 reg = <0x210000 0xDF0000>;
189 };
190 };
Stefan Roesecdccf9c2016-05-19 10:41:01 +0200191 };
192};
193
Pali Rohár0934ddd2022-02-14 11:34:30 +0100194/*
195 * Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through
196 * an FTDI (also on CON24(V2.0)/CON26(V1.4)).
197 */
Stefan Roese850db822016-05-17 14:03:25 +0200198&uart0 {
Gregory CLEMENT045504b2017-05-09 13:35:22 +0200199 pinctrl-names = "default";
200 pinctrl-0 = <&uart1_pins>;
Stefan Roese850db822016-05-17 14:03:25 +0200201 status = "okay";
202};
203
Pali Rohár0934ddd2022-02-14 11:34:30 +0100204/* CON26(V2.0)/CON28(V1.4) */
205&uart1 {
206 pinctrl-names = "default";
207 pinctrl-0 = <&uart2_pins>;
208 status = "okay";
209};
210
211/* CON27(V2.0)/CON29(V1.4) */
Stefan Roesef7332282016-08-26 13:50:41 +0200212&usb2 {
213 status = "okay";
214};
215
Pali Rohár0934ddd2022-02-14 11:34:30 +0100216/* CON29(V2.0)/CON31(V1.4) */
Stefan Roese850db822016-05-17 14:03:25 +0200217&usb3 {
218 status = "okay";
Pali Rohár0934ddd2022-02-14 11:34:30 +0100219 usb-phy = <&usb3_phy>;
Wilson Ding97341042018-03-26 15:57:31 +0800220};