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Eugen Hristevb8fc6542023-07-04 22:05:12 +03001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
FUKAUMI Naoki74273f12023-09-05 20:47:35 +09006#include <dt-bindings/leds/common.h>
Eugen Hristevb8fc6542023-07-04 22:05:12 +03007#include <dt-bindings/pinctrl/rockchip.h>
8#include "rk3588s.dtsi"
9
10/ {
11 model = "Radxa ROCK 5 Model A";
12 compatible = "radxa,rock-5a", "rockchip,rk3588s";
13
14 aliases {
15 mmc0 = &sdhci;
FUKAUMI Naoki74273f12023-09-05 20:47:35 +090016 mmc1 = &sdmmc;
Eugen Hristevb8fc6542023-07-04 22:05:12 +030017 serial2 = &uart2;
18 };
19
FUKAUMI Naoki74273f12023-09-05 20:47:35 +090020 analog-sound {
21 compatible = "audio-graph-card";
22 label = "rk3588-es8316";
23
24 widgets = "Microphone", "Mic Jack",
25 "Headphone", "Headphones";
26
27 routing = "MIC2", "Mic Jack",
28 "Headphones", "HPOL",
29 "Headphones", "HPOR";
30
31 dais = <&i2s0_8ch_p0>;
32 };
33
Eugen Hristevb8fc6542023-07-04 22:05:12 +030034 chosen {
35 stdout-path = "serial2:1500000n8";
36 };
FUKAUMI Naoki74273f12023-09-05 20:47:35 +090037
38 leds {
39 compatible = "gpio-leds";
40 pinctrl-names = "default";
41 pinctrl-0 = <&io_led>;
42
43 io-led {
44 color = <LED_COLOR_ID_BLUE>;
45 function = LED_FUNCTION_STATUS;
46 gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
47 linux,default-trigger = "heartbeat";
48 };
49 };
50
51 fan: pwm-fan {
52 compatible = "pwm-fan";
53 cooling-levels = <0 95 145 195 255>;
54 fan-supply = <&vcc_5v0>;
55 pwms = <&pwm3 0 50000 0>;
56 #cooling-cells = <2>;
57 };
58
59 vcc12v_dcin: vcc12v-dcin-regulator {
60 compatible = "regulator-fixed";
61 regulator-name = "vcc12v_dcin";
62 regulator-always-on;
63 regulator-boot-on;
64 regulator-min-microvolt = <12000000>;
65 regulator-max-microvolt = <12000000>;
66 };
67
68 vcc5v0_host: vcc5v0-host-regulator {
69 compatible = "regulator-fixed";
70 regulator-name = "vcc5v0_host";
71 regulator-boot-on;
72 regulator-always-on;
73 regulator-min-microvolt = <5000000>;
74 regulator-max-microvolt = <5000000>;
75 enable-active-high;
76 gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
77 pinctrl-names = "default";
78 pinctrl-0 = <&vcc5v0_host_en>;
79 vin-supply = <&vcc5v0_sys>;
80 };
81
82 vcc5v0_sys: vcc5v0-sys-regulator {
83 compatible = "regulator-fixed";
84 regulator-name = "vcc5v0_sys";
85 regulator-always-on;
86 regulator-boot-on;
87 regulator-min-microvolt = <5000000>;
88 regulator-max-microvolt = <5000000>;
89 vin-supply = <&vcc12v_dcin>;
90 };
91
92 vcc_5v0: vcc-5v0-regulator {
93 compatible = "regulator-fixed";
94 regulator-name = "vcc_5v0";
95 regulator-min-microvolt = <5000000>;
96 regulator-max-microvolt = <5000000>;
97 regulator-boot-on;
98 regulator-always-on;
99 enable-active-high;
100 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&vcc_5v0_en>;
103 vin-supply = <&vcc5v0_sys>;
104 };
105
106 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
107 compatible = "regulator-fixed";
108 regulator-name = "vcc_1v1_nldo_s3";
109 regulator-always-on;
110 regulator-boot-on;
111 regulator-min-microvolt = <1100000>;
112 regulator-max-microvolt = <1100000>;
113 vin-supply = <&vcc5v0_sys>;
114 };
115};
116
117&cpu_b0 {
118 cpu-supply = <&vdd_cpu_big0_s0>;
119};
120
121&cpu_b1 {
122 cpu-supply = <&vdd_cpu_big0_s0>;
123};
124
125&cpu_b2 {
126 cpu-supply = <&vdd_cpu_big1_s0>;
127};
128
129&cpu_b3 {
130 cpu-supply = <&vdd_cpu_big1_s0>;
131};
132
133&cpu_l0 {
134 cpu-supply = <&vdd_cpu_lit_s0>;
135};
136
137&cpu_l1 {
138 cpu-supply = <&vdd_cpu_lit_s0>;
139};
140
141&cpu_l2 {
142 cpu-supply = <&vdd_cpu_lit_s0>;
143};
144
145&cpu_l3 {
146 cpu-supply = <&vdd_cpu_lit_s0>;
147};
148
149&i2c0 {
150 pinctrl-names = "default";
151 pinctrl-0 = <&i2c0m2_xfer>;
152 status = "okay";
153
154 vdd_cpu_big0_s0: regulator@42 {
155 compatible = "rockchip,rk8602";
156 reg = <0x42>;
157 fcs,suspend-voltage-selector = <1>;
158 regulator-name = "vdd_cpu_big0_s0";
159 regulator-always-on;
160 regulator-boot-on;
161 regulator-min-microvolt = <550000>;
162 regulator-max-microvolt = <1050000>;
163 regulator-ramp-delay = <2300>;
164 vin-supply = <&vcc5v0_sys>;
165
166 regulator-state-mem {
167 regulator-off-in-suspend;
168 };
169 };
170
171 vdd_cpu_big1_s0: regulator@43 {
172 compatible = "rockchip,rk8603", "rockchip,rk8602";
173 reg = <0x43>;
174 fcs,suspend-voltage-selector = <1>;
175 regulator-name = "vdd_cpu_big1_s0";
176 regulator-always-on;
177 regulator-boot-on;
178 regulator-min-microvolt = <550000>;
179 regulator-max-microvolt = <1050000>;
180 regulator-ramp-delay = <2300>;
181 vin-supply = <&vcc5v0_sys>;
182
183 regulator-state-mem {
184 regulator-off-in-suspend;
185 };
186 };
187};
188
189&i2c2 {
190 status = "okay";
191
192 vdd_npu_s0: regulator@42 {
193 compatible = "rockchip,rk8602";
194 reg = <0x42>;
195 fcs,suspend-voltage-selector = <1>;
196 regulator-name = "vdd_npu_s0";
197 regulator-always-on;
198 regulator-boot-on;
199 regulator-min-microvolt = <550000>;
200 regulator-max-microvolt = <950000>;
201 regulator-ramp-delay = <2300>;
202 vin-supply = <&vcc5v0_sys>;
203
204 regulator-state-mem {
205 regulator-off-in-suspend;
206 };
207 };
208
209 eeprom: eeprom@50 {
210 compatible = "belling,bl24c16a", "atmel,24c16";
211 reg = <0x50>;
212 pagesize = <16>;
213 };
214};
215
216&i2c3 {
217 status = "okay";
218};
219
220&i2c5 {
221 status = "okay";
222 pinctrl-names = "default";
223 pinctrl-0 = <&i2c5m2_xfer>;
224};
225
226&i2c7 {
227 status = "okay";
228
229 es8316: audio-codec@11 {
230 compatible = "everest,es8316";
231 reg = <0x11>;
232 clocks = <&cru I2S0_8CH_MCLKOUT>;
233 clock-names = "mclk";
234 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
235 assigned-clock-rates = <12288000>;
236 #sound-dai-cells = <0>;
237
238 port {
239 es8316_p0_0: endpoint {
240 remote-endpoint = <&i2s0_8ch_p0_0>;
241 };
242 };
243 };
244};
245
246&i2s0_8ch {
247 pinctrl-names = "default";
248 pinctrl-0 = <&i2s0_lrck
249 &i2s0_mclk
250 &i2s0_sclk
251 &i2s0_sdi0
252 &i2s0_sdo0>;
253 status = "okay";
254
255 i2s0_8ch_p0: port {
256 i2s0_8ch_p0_0: endpoint {
257 dai-format = "i2s";
258 mclk-fs = <256>;
259 remote-endpoint = <&es8316_p0_0>;
260 };
261 };
Eugen Hristevb8fc6542023-07-04 22:05:12 +0300262};
263
264&gmac1 {
265 clock_in_out = "output";
266 phy-handle = <&rgmii_phy1>;
267 phy-mode = "rgmii";
268 pinctrl-0 = <&gmac1_miim
269 &gmac1_tx_bus2
270 &gmac1_rx_bus2
271 &gmac1_rgmii_clk
272 &gmac1_rgmii_bus>;
273 pinctrl-names = "default";
274 tx_delay = <0x3a>;
275 rx_delay = <0x3e>;
276 status = "okay";
277};
278
279&mdio1 {
280 rgmii_phy1: ethernet-phy@1 {
281 /* RTL8211F */
282 compatible = "ethernet-phy-id001c.c916";
283 reg = <0x1>;
284 pinctrl-names = "default";
285 pinctrl-0 = <&rtl8211f_rst>;
286 reset-assert-us = <20000>;
287 reset-deassert-us = <100000>;
288 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
289 };
290};
291
292&pinctrl {
FUKAUMI Naoki74273f12023-09-05 20:47:35 +0900293 leds {
294 io_led: io-led {
295 rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
296 };
297 };
298
299 power {
300 vcc_5v0_en: vcc-5v0-en {
301 rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
302 };
303 };
304
Eugen Hristevb8fc6542023-07-04 22:05:12 +0300305 rtl8211f {
306 rtl8211f_rst: rtl8211f-rst {
307 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
308 };
309 };
FUKAUMI Naoki74273f12023-09-05 20:47:35 +0900310
311 usb {
312 vcc5v0_host_en: vcc5v0-host-en {
313 rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
314 };
315 };
316
317 wifibt {
318 wl_reset: wl-reset {
319 rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
320 };
321
322 wl_dis: wl-dis {
323 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_output_high>;
324 };
325
326 wl_wake_host: wl-wake-host {
327 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
328 };
329
330 bt_dis: bt-dis {
331 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_output_high>;
332 };
333
334 bt_wake_host: bt-wake-host {
335 rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
336 };
337 };
338};
339
340&pwm3 {
341 pinctrl-names = "default";
342 pinctrl-0 = <&pwm3m1_pins>;
343 status = "okay";
344};
345
346&saradc {
347 vref-supply = <&avcc_1v8_s0>;
348 status = "okay";
Eugen Hristevb8fc6542023-07-04 22:05:12 +0300349};
350
351&sdhci {
352 bus-width = <8>;
353 no-sdio;
354 no-sd;
355 non-removable;
Eugen Hristevb8fc6542023-07-04 22:05:12 +0300356 mmc-hs400-1_8v;
357 mmc-hs400-enhanced-strobe;
358 status = "okay";
359};
360
FUKAUMI Naoki74273f12023-09-05 20:47:35 +0900361&sdmmc {
362 bus-width = <4>;
363 cap-mmc-highspeed;
364 cap-sd-highspeed;
365 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
366 disable-wp;
367 max-frequency = <150000000>;
368 no-sdio;
369 no-mmc;
370 sd-uhs-sdr104;
371 vmmc-supply = <&vcc_3v3_s0>;
372 vqmmc-supply = <&vccio_sd_s0>;
373 status = "okay";
374};
375
376&spi2 {
377 status = "okay";
378 assigned-clocks = <&cru CLK_SPI2>;
379 assigned-clock-rates = <200000000>;
380 num-cs = <1>;
381 pinctrl-names = "default";
382 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
383
384 pmic@0 {
385 compatible = "rockchip,rk806";
386 reg = <0x0>;
387 interrupt-parent = <&gpio0>;
388 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
389 pinctrl-names = "default";
390 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
391 <&rk806_dvs2_null>, <&rk806_dvs3_null>;
392 spi-max-frequency = <1000000>;
393
394 vcc1-supply = <&vcc5v0_sys>;
395 vcc2-supply = <&vcc5v0_sys>;
396 vcc3-supply = <&vcc5v0_sys>;
397 vcc4-supply = <&vcc5v0_sys>;
398 vcc5-supply = <&vcc5v0_sys>;
399 vcc6-supply = <&vcc5v0_sys>;
400 vcc7-supply = <&vcc5v0_sys>;
401 vcc8-supply = <&vcc5v0_sys>;
402 vcc9-supply = <&vcc5v0_sys>;
403 vcc10-supply = <&vcc5v0_sys>;
404 vcc11-supply = <&vcc_2v0_pldo_s3>;
405 vcc12-supply = <&vcc5v0_sys>;
406 vcc13-supply = <&vcc_1v1_nldo_s3>;
407 vcc14-supply = <&vcc_1v1_nldo_s3>;
408 vcca-supply = <&vcc5v0_sys>;
409
410 gpio-controller;
411 #gpio-cells = <2>;
412
413 rk806_dvs1_null: dvs1-null-pins {
414 pins = "gpio_pwrctrl2";
415 function = "pin_fun0";
416 };
417
418 rk806_dvs2_null: dvs2-null-pins {
419 pins = "gpio_pwrctrl2";
420 function = "pin_fun0";
421 };
422
423 rk806_dvs3_null: dvs3-null-pins {
424 pins = "gpio_pwrctrl3";
425 function = "pin_fun0";
426 };
427
428 regulators {
429 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
430 regulator-name = "vdd_gpu_s0";
431 regulator-boot-on;
432 regulator-min-microvolt = <550000>;
433 regulator-max-microvolt = <950000>;
434 regulator-ramp-delay = <12500>;
435 regulator-enable-ramp-delay = <400>;
436
437 regulator-state-mem {
438 regulator-off-in-suspend;
439 };
440 };
441
442 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
443 regulator-name = "vdd_cpu_lit_s0";
444 regulator-always-on;
445 regulator-boot-on;
446 regulator-min-microvolt = <550000>;
447 regulator-max-microvolt = <950000>;
448 regulator-ramp-delay = <12500>;
449
450 regulator-state-mem {
451 regulator-off-in-suspend;
452 };
453 };
454
455 vdd_log_s0: dcdc-reg3 {
456 regulator-name = "vdd_log_s0";
457 regulator-always-on;
458 regulator-boot-on;
459 regulator-min-microvolt = <675000>;
460 regulator-max-microvolt = <750000>;
461 regulator-ramp-delay = <12500>;
462
463 regulator-state-mem {
464 regulator-off-in-suspend;
465 regulator-suspend-microvolt = <750000>;
466 };
467 };
468
469 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
470 regulator-name = "vdd_vdenc_s0";
471 regulator-always-on;
472 regulator-boot-on;
473 regulator-min-microvolt = <550000>;
474 regulator-max-microvolt = <950000>;
475 regulator-ramp-delay = <12500>;
476
477 regulator-state-mem {
478 regulator-off-in-suspend;
479 };
480 };
481
482 vdd_ddr_s0: dcdc-reg5 {
483 regulator-name = "vdd_ddr_s0";
484 regulator-always-on;
485 regulator-boot-on;
486 regulator-min-microvolt = <675000>;
487 regulator-max-microvolt = <900000>;
488 regulator-ramp-delay = <12500>;
489
490 regulator-state-mem {
491 regulator-off-in-suspend;
492 regulator-suspend-microvolt = <850000>;
493 };
494 };
495
496 vdd2_ddr_s3: dcdc-reg6 {
497 regulator-name = "vdd2_ddr_s3";
498 regulator-always-on;
499 regulator-boot-on;
500
501 regulator-state-mem {
502 regulator-on-in-suspend;
503 };
504 };
505
506 vcc_2v0_pldo_s3: dcdc-reg7 {
507 regulator-name = "vdd_2v0_pldo_s3";
508 regulator-always-on;
509 regulator-boot-on;
510 regulator-min-microvolt = <2000000>;
511 regulator-max-microvolt = <2000000>;
512 regulator-ramp-delay = <12500>;
513
514 regulator-state-mem {
515 regulator-on-in-suspend;
516 regulator-suspend-microvolt = <2000000>;
517 };
518 };
519
520 vcc_3v3_s3: dcdc-reg8 {
521 regulator-name = "vcc_3v3_s3";
522 regulator-always-on;
523 regulator-boot-on;
524 regulator-min-microvolt = <3300000>;
525 regulator-max-microvolt = <3300000>;
526
527 regulator-state-mem {
528 regulator-on-in-suspend;
529 regulator-suspend-microvolt = <3300000>;
530 };
531 };
532
533 vddq_ddr_s0: dcdc-reg9 {
534 regulator-name = "vddq_ddr_s0";
535 regulator-always-on;
536 regulator-boot-on;
537
538 regulator-state-mem {
539 regulator-off-in-suspend;
540 };
541 };
542
543 vcc_1v8_s3: dcdc-reg10 {
544 regulator-name = "vcc_1v8_s3";
545 regulator-always-on;
546 regulator-boot-on;
547 regulator-min-microvolt = <1800000>;
548 regulator-max-microvolt = <1800000>;
549
550 regulator-state-mem {
551 regulator-on-in-suspend;
552 regulator-suspend-microvolt = <1800000>;
553 };
554 };
555
556 avcc_1v8_s0: pldo-reg1 {
557 regulator-name = "avcc_1v8_s0";
558 regulator-always-on;
559 regulator-boot-on;
560 regulator-min-microvolt = <1800000>;
561 regulator-max-microvolt = <1800000>;
562
563 regulator-state-mem {
564 regulator-off-in-suspend;
565 };
566 };
567
568 vcc_1v8_s0: pldo-reg2 {
569 regulator-name = "vcc_1v8_s0";
570 regulator-always-on;
571 regulator-boot-on;
572 regulator-min-microvolt = <1800000>;
573 regulator-max-microvolt = <1800000>;
574
575 regulator-state-mem {
576 regulator-off-in-suspend;
577 regulator-suspend-microvolt = <1800000>;
578 };
579 };
580
581 avdd_1v2_s0: pldo-reg3 {
582 regulator-name = "avdd_1v2_s0";
583 regulator-always-on;
584 regulator-boot-on;
585 regulator-min-microvolt = <1200000>;
586 regulator-max-microvolt = <1200000>;
587
588 regulator-state-mem {
589 regulator-off-in-suspend;
590 };
591 };
592
593 vcc_3v3_s0: pldo-reg4 {
594 regulator-name = "vcc_3v3_s0";
595 regulator-always-on;
596 regulator-boot-on;
597 regulator-min-microvolt = <3300000>;
598 regulator-max-microvolt = <3300000>;
599 regulator-ramp-delay = <12500>;
600
601 regulator-state-mem {
602 regulator-off-in-suspend;
603 };
604 };
605
606 vccio_sd_s0: pldo-reg5 {
607 regulator-name = "vccio_sd_s0";
608 regulator-always-on;
609 regulator-boot-on;
610 regulator-min-microvolt = <1800000>;
611 regulator-max-microvolt = <3300000>;
612 regulator-ramp-delay = <12500>;
613
614 regulator-state-mem {
615 regulator-off-in-suspend;
616 };
617 };
618
619 pldo6_s3: pldo-reg6 {
620 regulator-name = "pldo6_s3";
621 regulator-always-on;
622 regulator-boot-on;
623 regulator-min-microvolt = <1800000>;
624 regulator-max-microvolt = <1800000>;
625
626 regulator-state-mem {
627 regulator-on-in-suspend;
628 regulator-suspend-microvolt = <1800000>;
629 };
630 };
631
632 vdd_0v75_s3: nldo-reg1 {
633 regulator-name = "vdd_0v75_s3";
634 regulator-always-on;
635 regulator-boot-on;
636 regulator-min-microvolt = <750000>;
637 regulator-max-microvolt = <750000>;
638
639 regulator-state-mem {
640 regulator-on-in-suspend;
641 regulator-suspend-microvolt = <750000>;
642 };
643 };
644
645 vdd_ddr_pll_s0: nldo-reg2 {
646 regulator-name = "vdd_ddr_pll_s0";
647 regulator-always-on;
648 regulator-boot-on;
649 regulator-min-microvolt = <850000>;
650 regulator-max-microvolt = <850000>;
651
652 regulator-state-mem {
653 regulator-off-in-suspend;
654 regulator-suspend-microvolt = <850000>;
655 };
656 };
657
658 avdd_0v75_s0: nldo-reg3 {
659 regulator-name = "avdd_0v75_s0";
660 regulator-always-on;
661 regulator-boot-on;
662 regulator-min-microvolt = <750000>;
663 regulator-max-microvolt = <750000>;
664
665 regulator-state-mem {
666 regulator-off-in-suspend;
667 };
668 };
669
670 vdd_0v85_s0: nldo-reg4 {
671 regulator-name = "vdd_0v85_s0";
672 regulator-always-on;
673 regulator-boot-on;
674 regulator-min-microvolt = <850000>;
675 regulator-max-microvolt = <850000>;
676
677 regulator-state-mem {
678 regulator-off-in-suspend;
679 };
680 };
681
682 vdd_0v75_s0: nldo-reg5 {
683 regulator-name = "vdd_0v75_s0";
684 regulator-always-on;
685 regulator-boot-on;
686 regulator-min-microvolt = <750000>;
687 regulator-max-microvolt = <750000>;
688
689 regulator-state-mem {
690 regulator-off-in-suspend;
691 };
692 };
693 };
694 };
695};
696
697&u2phy2 {
698 status = "okay";
699};
700
701&u2phy2_host {
702 status = "okay";
703 phy-supply = <&vcc5v0_host>;
704};
705
706&u2phy3 {
707 status = "okay";
708};
709
710&u2phy3_host {
711 phy-supply = <&vcc5v0_host>;
712 status = "okay";
713};
714
Eugen Hristevb8fc6542023-07-04 22:05:12 +0300715&uart2 {
716 pinctrl-0 = <&uart2m0_xfer>;
717 status = "okay";
718};
FUKAUMI Naoki74273f12023-09-05 20:47:35 +0900719
720&usb_host0_ehci {
721 status = "okay";
722 pinctrl-names = "default";
723 pinctrl-0 = <&wl_reset &wl_dis &wl_wake_host &bt_dis &bt_wake_host>;
724};
725
726&usb_host0_ohci {
727 status = "okay";
728};
729
730&usb_host1_ehci {
731 status = "okay";
732};
733
734&usb_host1_ohci {
735 status = "okay";
736};