Wolfgang Denk | 99b0d28 | 2005-10-05 00:19:34 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Rick Bronson <rick@efn.org> |
| 3 | * |
| 4 | * Configuation settings for the AT91RM9200DK board. |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | /* |
| 26 | * Adatped for KwikByte KB920x board from at91rm9200dk.h: 22APR2005 |
| 27 | */ |
| 28 | |
| 29 | #ifndef __CONFIG_H |
| 30 | #define __CONFIG_H |
| 31 | |
| 32 | /* ARM asynchronous clock */ |
| 33 | #define AT91C_MAIN_CLOCK 180000000 /* from 10 MHz crystal */ |
| 34 | #define AT91C_MASTER_CLOCK 60000000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */ |
| 35 | |
| 36 | #define AT91_SLOW_CLOCK 32768 /* slow clock */ |
| 37 | |
| 38 | #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ |
| 39 | #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ |
| 40 | /* Only define one of the following, based on board type */ |
| 41 | /* #define CONFIG_KB9200 1 KwikByte KB9202 board */ |
| 42 | /* #define CONFIG_KB9201 1 KwikByte KB9202 board */ |
| 43 | #define CONFIG_KB9202 1 /* KwikByte KB9202 board */ |
| 44 | |
| 45 | #define CONFIG_KB920x 1 /* Any KB920x board */ |
| 46 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| 47 | #define USE_920T_MMU 1 |
| 48 | |
| 49 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 50 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 51 | #define CONFIG_INITRD_TAG 1 |
| 52 | |
| 53 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 54 | |
| 55 | #define CFG_LONGHELP |
| 56 | |
| 57 | /* |
| 58 | * Size of malloc() pool |
| 59 | */ |
| 60 | #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) |
| 61 | #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
| 62 | |
| 63 | #define CONFIG_BAUDRATE 115200 |
| 64 | |
| 65 | /* |
| 66 | * Hardware drivers |
| 67 | */ |
| 68 | |
| 69 | /* define one of these to choose the DBGU, USART0 or USART1 as console */ |
| 70 | #define CONFIG_DBGU |
| 71 | #undef CONFIG_USART0 |
| 72 | #undef CONFIG_USART1 |
| 73 | |
| 74 | #undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */ |
| 75 | |
| 76 | #undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */ |
| 77 | |
| 78 | #define CONFIG_BOOTDELAY 3 |
| 79 | #define CONFIG_ENV_OVERWRITE 1 |
| 80 | |
| 81 | #define CONFIG_COMMANDS \ |
| 82 | ((CONFIG_CMD_DFL | \ |
| 83 | CFG_CMD_I2C | \ |
| 84 | CFG_CMD_PING | \ |
| 85 | CFG_CMD_DHCP ) & \ |
| 86 | ~(CFG_CMD_BDI | \ |
| 87 | CFG_CMD_FPGA | \ |
| 88 | CFG_CMD_MISC)) |
| 89 | |
| 90 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
| 91 | #include <cmd_confdefs.h> |
| 92 | |
| 93 | #define CONFIG_NR_DRAM_BANKS 1 |
| 94 | #define PHYS_SDRAM 0x20000000 |
| 95 | #define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */ |
| 96 | |
| 97 | #define CFG_MEMTEST_START PHYS_SDRAM |
| 98 | #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - (512*1024) |
| 99 | |
| 100 | #define CONFIG_DRIVER_ETHER |
| 101 | #define CONFIG_NET_RETRY_COUNT 20 |
| 102 | |
| 103 | #define CFG_FLASH_BASE 0x10000000 |
| 104 | |
| 105 | #ifdef CONFIG_KB9202 |
| 106 | #define PHYS_FLASH_SIZE 0x1000000 |
| 107 | #else |
| 108 | #define PHYS_FLASH_SIZE 0x200000 |
| 109 | #endif |
| 110 | |
| 111 | #define CFG_MAX_FLASH_BANKS 1 |
| 112 | #define CFG_MAX_FLASH_SECT 256 |
| 113 | |
| 114 | #define CONFIG_HARD_I2C |
| 115 | |
| 116 | #define CFG_ENV_IS_IN_EEPROM |
| 117 | |
| 118 | #ifdef CONFIG_KB9202 |
Wolfgang Denk | 78da607 | 2005-10-06 01:22:22 +0200 | [diff] [blame] | 119 | #define CFG_ENV_OFFSET 0x3E00 |
| 120 | #define CFG_ENV_SIZE 0x0200 |
Wolfgang Denk | 99b0d28 | 2005-10-05 00:19:34 +0200 | [diff] [blame] | 121 | #else |
| 122 | #define CFG_ENV_OFFSET 0x1000 |
| 123 | #define CFG_ENV_SIZE 0x1000 |
| 124 | #endif |
| 125 | #define CFG_I2C_EEPROM_ADDR 0x50 |
| 126 | #define CFG_EEPROM_PAGE_WRITE_BITS 6 |
| 127 | #define CFG_I2C_EEPROM_ADDR_LEN 2 |
| 128 | #define CFG_I2C_SPEED 50000 |
| 129 | #define CFG_I2C_SLAVE 0 /* not used */ |
| 130 | #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 |
| 131 | |
| 132 | #define CFG_LOAD_ADDR 0x21000000 /* default load address */ |
| 133 | |
| 134 | #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
| 135 | |
| 136 | #define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */ |
| 137 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 138 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 139 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 140 | |
| 141 | #define CFG_FLASH_CFI_DRIVER |
| 142 | #define CFG_FLASH_CFI |
| 143 | |
| 144 | #ifndef __ASSEMBLY__ |
| 145 | /*----------------------------------------------------------------------- |
| 146 | * Board specific extension for bd_info |
| 147 | * |
| 148 | * This structure is embedded in the global bd_info (bd_t) structure |
| 149 | * and can be used by the board specific code (eg board/...) |
| 150 | */ |
| 151 | |
| 152 | struct bd_info_ext { |
| 153 | /* helper variable for board environment handling |
| 154 | * |
| 155 | * env_crc_valid == 0 => uninitialised |
| 156 | * env_crc_valid > 0 => environment crc in flash is valid |
| 157 | * env_crc_valid < 0 => environment crc in flash is invalid |
| 158 | */ |
| 159 | int env_crc_valid; |
| 160 | }; |
| 161 | #endif |
| 162 | |
| 163 | #define CFG_HZ 1000 |
| 164 | #define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */ |
| 165 | /* AT91C_TC_TIMER_DIV1_CLOCK */ |
| 166 | |
| 167 | #define CONFIG_STACKSIZE (32*1024) /* regular stack */ |
| 168 | |
| 169 | #ifdef CONFIG_USE_IRQ |
| 170 | #error CONFIG_USE_IRQ not supported |
| 171 | #endif |
| 172 | |
| 173 | #endif |