blob: 659461088b73b48d08cfad846b98fb51d406cfac [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass34374692015-08-30 16:55:39 -06002/*
3 * (C) Copyright 2015 Google, Inc
4 *
5 * (C) Copyright 2008-2014 Rockchip Electronics
6 * Peter, Software Engineering, <superpeter.cai@gmail.com>.
Simon Glass34374692015-08-30 16:55:39 -06007 */
8
9#include <common.h>
10#include <clk.h>
11#include <dm.h>
12#include <errno.h>
13#include <i2c.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060014#include <log.h>
Simon Glass34374692015-08-30 16:55:39 -060015#include <asm/io.h>
Kever Yang15f09a12019-03-28 11:01:23 +080016#include <asm/arch-rockchip/clock.h>
17#include <asm/arch-rockchip/i2c.h>
18#include <asm/arch-rockchip/periph.h>
Simon Glass34374692015-08-30 16:55:39 -060019#include <dm/pinctrl.h>
Simon Glassc05ed002020-05-10 11:40:11 -060020#include <linux/delay.h>
Simon Glass34374692015-08-30 16:55:39 -060021#include <linux/sizes.h>
22
Simon Glass34374692015-08-30 16:55:39 -060023/* i2c timerout */
24#define I2C_TIMEOUT_MS 100
25#define I2C_RETRY_COUNT 3
26
27/* rk i2c fifo max transfer bytes */
28#define RK_I2C_FIFO_SIZE 32
29
30struct rk_i2c {
Stephen Warren135aa952016-06-17 09:44:00 -060031 struct clk clk;
Simon Glass34374692015-08-30 16:55:39 -060032 struct i2c_regs *regs;
33 unsigned int speed;
Simon Glass34374692015-08-30 16:55:39 -060034};
35
Alexander Kochetkov5944bd92018-02-26 20:42:54 +030036enum {
37 RK_I2C_LEGACY,
38 RK_I2C_NEW,
39};
40
41/**
42 * @controller_type: i2c controller type
43 */
44struct rk_i2c_soc_data {
45 int controller_type;
46};
47
Simon Glass34374692015-08-30 16:55:39 -060048static inline void rk_i2c_get_div(int div, int *divh, int *divl)
49{
50 *divl = div / 2;
51 if (div % 2 == 0)
52 *divh = div / 2;
53 else
54 *divh = DIV_ROUND_UP(div, 2);
55}
56
57/*
58 * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1)
59 * SCL = PCLK / SCLK Divisor
60 * i2c_rate = PCLK
61 */
62static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
63{
64 uint32_t i2c_rate;
65 int div, divl, divh;
66
67 /* First get i2c rate from pclk */
Stephen Warren135aa952016-06-17 09:44:00 -060068 i2c_rate = clk_get_rate(&i2c->clk);
Simon Glass34374692015-08-30 16:55:39 -060069
70 div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2;
71 divh = 0;
72 divl = 0;
73 if (div >= 0)
74 rk_i2c_get_div(div, &divh, &divl);
75 writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv);
76
77 debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
78 scl_rate);
79 debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl);
80 debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
81}
82
83static void rk_i2c_show_regs(struct i2c_regs *regs)
84{
85#ifdef DEBUG
86 uint i;
87
88 debug("i2c_con: 0x%08x\n", readl(&regs->con));
89 debug("i2c_clkdiv: 0x%08x\n", readl(&regs->clkdiv));
90 debug("i2c_mrxaddr: 0x%08x\n", readl(&regs->mrxaddr));
91 debug("i2c_mrxraddR: 0x%08x\n", readl(&regs->mrxraddr));
92 debug("i2c_mtxcnt: 0x%08x\n", readl(&regs->mtxcnt));
93 debug("i2c_mrxcnt: 0x%08x\n", readl(&regs->mrxcnt));
94 debug("i2c_ien: 0x%08x\n", readl(&regs->ien));
95 debug("i2c_ipd: 0x%08x\n", readl(&regs->ipd));
96 debug("i2c_fcnt: 0x%08x\n", readl(&regs->fcnt));
97 for (i = 0; i < 8; i++)
98 debug("i2c_txdata%d: 0x%08x\n", i, readl(&regs->txdata[i]));
99 for (i = 0; i < 8; i++)
100 debug("i2c_rxdata%d: 0x%08x\n", i, readl(&regs->rxdata[i]));
101#endif
102}
103
104static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
105{
106 struct i2c_regs *regs = i2c->regs;
107 ulong start;
108
109 debug("I2c Send Start bit.\n");
110 writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
111
112 writel(I2C_CON_EN | I2C_CON_START, &regs->con);
113 writel(I2C_STARTIEN, &regs->ien);
114
115 start = get_timer(0);
116 while (1) {
117 if (readl(&regs->ipd) & I2C_STARTIPD) {
118 writel(I2C_STARTIPD, &regs->ipd);
119 break;
120 }
121 if (get_timer(start) > I2C_TIMEOUT_MS) {
122 debug("I2C Send Start Bit Timeout\n");
123 rk_i2c_show_regs(regs);
124 return -ETIMEDOUT;
125 }
126 udelay(1);
127 }
128
129 return 0;
130}
131
132static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
133{
134 struct i2c_regs *regs = i2c->regs;
135 ulong start;
136
137 debug("I2c Send Stop bit.\n");
138 writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
139
140 writel(I2C_CON_EN | I2C_CON_STOP, &regs->con);
141 writel(I2C_CON_STOP, &regs->ien);
142
143 start = get_timer(0);
144 while (1) {
145 if (readl(&regs->ipd) & I2C_STOPIPD) {
146 writel(I2C_STOPIPD, &regs->ipd);
147 break;
148 }
149 if (get_timer(start) > I2C_TIMEOUT_MS) {
150 debug("I2C Send Start Bit Timeout\n");
151 rk_i2c_show_regs(regs);
152 return -ETIMEDOUT;
153 }
154 udelay(1);
155 }
156
157 return 0;
158}
159
160static inline void rk_i2c_disable(struct rk_i2c *i2c)
161{
162 writel(0, &i2c->regs->con);
163}
164
165static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
166 uchar *buf, uint b_len)
167{
168 struct i2c_regs *regs = i2c->regs;
169 uchar *pbuf = buf;
170 uint bytes_remain_len = b_len;
171 uint bytes_xferred = 0;
172 uint words_xferred = 0;
173 ulong start;
174 uint con = 0;
175 uint rxdata;
176 uint i, j;
177 int err;
Wadim Egorov5deaa532017-08-03 13:48:11 +0200178 bool snd_chunk = false;
Simon Glass34374692015-08-30 16:55:39 -0600179
180 debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
181 chip, reg, r_len, b_len);
182
183 err = rk_i2c_send_start_bit(i2c);
184 if (err)
185 return err;
186
187 writel(I2C_MRXADDR_SET(1, chip << 1 | 1), &regs->mrxaddr);
188 if (r_len == 0) {
189 writel(0, &regs->mrxraddr);
190 } else if (r_len < 4) {
191 writel(I2C_MRXRADDR_SET(r_len, reg), &regs->mrxraddr);
192 } else {
193 debug("I2C Read: addr len %d not supported\n", r_len);
194 return -EIO;
195 }
196
197 while (bytes_remain_len) {
198 if (bytes_remain_len > RK_I2C_FIFO_SIZE) {
Wadim Egorov5deaa532017-08-03 13:48:11 +0200199 con = I2C_CON_EN;
Simon Glass34374692015-08-30 16:55:39 -0600200 bytes_xferred = 32;
201 } else {
Wadim Egorov5deaa532017-08-03 13:48:11 +0200202 /*
203 * The hw can read up to 32 bytes at a time. If we need
204 * more than one chunk, send an ACK after the last byte.
205 */
206 con = I2C_CON_EN | I2C_CON_LASTACK;
Simon Glass34374692015-08-30 16:55:39 -0600207 bytes_xferred = bytes_remain_len;
208 }
209 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
210
Wadim Egorov5deaa532017-08-03 13:48:11 +0200211 /*
212 * make sure we are in plain RX mode if we read a second chunk
213 */
214 if (snd_chunk)
215 con |= I2C_CON_MOD(I2C_MODE_RX);
216 else
217 con |= I2C_CON_MOD(I2C_MODE_TRX);
218
Simon Glass34374692015-08-30 16:55:39 -0600219 writel(con, &regs->con);
220 writel(bytes_xferred, &regs->mrxcnt);
221 writel(I2C_MBRFIEN | I2C_NAKRCVIEN, &regs->ien);
222
223 start = get_timer(0);
224 while (1) {
225 if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
226 writel(I2C_NAKRCVIPD, &regs->ipd);
227 err = -EREMOTEIO;
228 }
229 if (readl(&regs->ipd) & I2C_MBRFIPD) {
230 writel(I2C_MBRFIPD, &regs->ipd);
231 break;
232 }
233 if (get_timer(start) > I2C_TIMEOUT_MS) {
234 debug("I2C Read Data Timeout\n");
235 err = -ETIMEDOUT;
236 rk_i2c_show_regs(regs);
237 goto i2c_exit;
238 }
239 udelay(1);
240 }
241
242 for (i = 0; i < words_xferred; i++) {
243 rxdata = readl(&regs->rxdata[i]);
244 debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata);
245 for (j = 0; j < 4; j++) {
246 if ((i * 4 + j) == bytes_xferred)
247 break;
248 *pbuf++ = (rxdata >> (j * 8)) & 0xff;
249 }
250 }
251
252 bytes_remain_len -= bytes_xferred;
Wadim Egorov5deaa532017-08-03 13:48:11 +0200253 snd_chunk = true;
Simon Glass34374692015-08-30 16:55:39 -0600254 debug("I2C Read bytes_remain_len %d\n", bytes_remain_len);
255 }
256
257i2c_exit:
Simon Glass34374692015-08-30 16:55:39 -0600258 rk_i2c_disable(i2c);
259
260 return err;
261}
262
263static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
264 uchar *buf, uint b_len)
265{
266 struct i2c_regs *regs = i2c->regs;
267 int err;
268 uchar *pbuf = buf;
269 uint bytes_remain_len = b_len + r_len + 1;
270 uint bytes_xferred = 0;
271 uint words_xferred = 0;
272 ulong start;
273 uint txdata;
274 uint i, j;
275
276 debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
277 chip, reg, r_len, b_len);
278 err = rk_i2c_send_start_bit(i2c);
279 if (err)
280 return err;
281
282 while (bytes_remain_len) {
283 if (bytes_remain_len > RK_I2C_FIFO_SIZE)
John Keeping80333fd2016-08-18 20:08:40 +0100284 bytes_xferred = RK_I2C_FIFO_SIZE;
Simon Glass34374692015-08-30 16:55:39 -0600285 else
286 bytes_xferred = bytes_remain_len;
287 words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
288
289 for (i = 0; i < words_xferred; i++) {
290 txdata = 0;
291 for (j = 0; j < 4; j++) {
292 if ((i * 4 + j) == bytes_xferred)
293 break;
294
John Keeping21d4b7d2016-08-18 20:08:42 +0100295 if (i == 0 && j == 0 && pbuf == buf) {
Simon Glass34374692015-08-30 16:55:39 -0600296 txdata |= (chip << 1);
John Keeping21d4b7d2016-08-18 20:08:42 +0100297 } else if (i == 0 && j <= r_len && pbuf == buf) {
Simon Glass34374692015-08-30 16:55:39 -0600298 txdata |= (reg &
299 (0xff << ((j - 1) * 8))) << 8;
300 } else {
301 txdata |= (*pbuf++)<<(j * 8);
302 }
Simon Glass34374692015-08-30 16:55:39 -0600303 }
John Keeping551288b2016-08-18 20:08:41 +0100304 writel(txdata, &regs->txdata[i]);
305 debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
Simon Glass34374692015-08-30 16:55:39 -0600306 }
307
308 writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), &regs->con);
309 writel(bytes_xferred, &regs->mtxcnt);
310 writel(I2C_MBTFIEN | I2C_NAKRCVIEN, &regs->ien);
311
312 start = get_timer(0);
313 while (1) {
314 if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
315 writel(I2C_NAKRCVIPD, &regs->ipd);
316 err = -EREMOTEIO;
317 }
318 if (readl(&regs->ipd) & I2C_MBTFIPD) {
319 writel(I2C_MBTFIPD, &regs->ipd);
320 break;
321 }
322 if (get_timer(start) > I2C_TIMEOUT_MS) {
323 debug("I2C Write Data Timeout\n");
324 err = -ETIMEDOUT;
325 rk_i2c_show_regs(regs);
326 goto i2c_exit;
327 }
328 udelay(1);
329 }
330
331 bytes_remain_len -= bytes_xferred;
332 debug("I2C Write bytes_remain_len %d\n", bytes_remain_len);
333 }
334
335i2c_exit:
Simon Glass34374692015-08-30 16:55:39 -0600336 rk_i2c_disable(i2c);
337
338 return err;
339}
340
341static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
342 int nmsgs)
343{
344 struct rk_i2c *i2c = dev_get_priv(bus);
345 int ret;
346
347 debug("i2c_xfer: %d messages\n", nmsgs);
348 for (; nmsgs > 0; nmsgs--, msg++) {
349 debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
350 if (msg->flags & I2C_M_RD) {
351 ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
352 msg->len);
353 } else {
354 ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
355 msg->len);
356 }
357 if (ret) {
358 debug("i2c_write: error sending\n");
359 return -EREMOTEIO;
360 }
361 }
362
Vasily Khoruzhickc9fca5e2019-11-16 11:32:57 -0800363 rk_i2c_send_stop_bit(i2c);
364 rk_i2c_disable(i2c);
365
Simon Glass34374692015-08-30 16:55:39 -0600366 return 0;
367}
368
369int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
370{
371 struct rk_i2c *i2c = dev_get_priv(bus);
372
373 rk_i2c_set_clk(i2c, speed);
374
375 return 0;
376}
377
Simon Glass930bc372016-01-21 19:43:42 -0700378static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)
Simon Glass34374692015-08-30 16:55:39 -0600379{
Simon Glass930bc372016-01-21 19:43:42 -0700380 struct rk_i2c *priv = dev_get_priv(bus);
Simon Glass34374692015-08-30 16:55:39 -0600381 int ret;
382
Simon Glass930bc372016-01-21 19:43:42 -0700383 ret = clk_get_by_index(bus, 0, &priv->clk);
384 if (ret < 0) {
385 debug("%s: Could not get clock for %s: %d\n", __func__,
386 bus->name, ret);
Simon Glass34374692015-08-30 16:55:39 -0600387 return ret;
Simon Glass930bc372016-01-21 19:43:42 -0700388 }
Simon Glass930bc372016-01-21 19:43:42 -0700389
390 return 0;
391}
392
393static int rockchip_i2c_probe(struct udevice *bus)
394{
395 struct rk_i2c *priv = dev_get_priv(bus);
Alexander Kochetkov5944bd92018-02-26 20:42:54 +0300396 struct rk_i2c_soc_data *soc_data;
397 struct udevice *pinctrl;
398 int bus_nr;
399 int ret;
Simon Glass930bc372016-01-21 19:43:42 -0700400
Philipp Tomsichcc91bdf2017-09-11 22:04:23 +0200401 priv->regs = dev_read_addr_ptr(bus);
Simon Glass930bc372016-01-21 19:43:42 -0700402
Alexander Kochetkov5944bd92018-02-26 20:42:54 +0300403 soc_data = (struct rk_i2c_soc_data*)dev_get_driver_data(bus);
404
405 if (soc_data->controller_type == RK_I2C_LEGACY) {
406 ret = dev_read_alias_seq(bus, &bus_nr);
407 if (ret < 0) {
408 debug("%s: Could not get alias for %s: %d\n",
409 __func__, bus->name, ret);
410 return ret;
411 }
412
413 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
414 if (ret) {
415 debug("%s: Cannot find pinctrl device\n", __func__);
416 return ret;
417 }
418
419 /* pinctrl will switch I2C to new type */
420 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_I2C0 + bus_nr);
421 if (ret) {
422 debug("%s: Failed to switch I2C to new type %s: %d\n",
423 __func__, bus->name, ret);
424 return ret;
425 }
426 }
427
Simon Glass930bc372016-01-21 19:43:42 -0700428 return 0;
Simon Glass34374692015-08-30 16:55:39 -0600429}
430
431static const struct dm_i2c_ops rockchip_i2c_ops = {
432 .xfer = rockchip_i2c_xfer,
433 .set_bus_speed = rockchip_i2c_set_bus_speed,
434};
435
Alexander Kochetkov5944bd92018-02-26 20:42:54 +0300436static const struct rk_i2c_soc_data rk3066_soc_data = {
437 .controller_type = RK_I2C_LEGACY,
438};
439
440static const struct rk_i2c_soc_data rk3188_soc_data = {
441 .controller_type = RK_I2C_LEGACY,
442};
443
444static const struct rk_i2c_soc_data rk3228_soc_data = {
445 .controller_type = RK_I2C_NEW,
446};
447
448static const struct rk_i2c_soc_data rk3288_soc_data = {
449 .controller_type = RK_I2C_NEW,
450};
451
452static const struct rk_i2c_soc_data rk3328_soc_data = {
453 .controller_type = RK_I2C_NEW,
454};
455
456static const struct rk_i2c_soc_data rk3399_soc_data = {
457 .controller_type = RK_I2C_NEW,
458};
459
Simon Glass34374692015-08-30 16:55:39 -0600460static const struct udevice_id rockchip_i2c_ids[] = {
Alexander Kochetkov5944bd92018-02-26 20:42:54 +0300461 {
462 .compatible = "rockchip,rk3066-i2c",
463 .data = (ulong)&rk3066_soc_data,
464 },
465 {
466 .compatible = "rockchip,rk3188-i2c",
467 .data = (ulong)&rk3188_soc_data,
468 },
469 {
470 .compatible = "rockchip,rk3228-i2c",
471 .data = (ulong)&rk3228_soc_data,
472 },
473 {
474 .compatible = "rockchip,rk3288-i2c",
475 .data = (ulong)&rk3288_soc_data,
476 },
477 {
478 .compatible = "rockchip,rk3328-i2c",
479 .data = (ulong)&rk3328_soc_data,
480 },
481 {
482 .compatible = "rockchip,rk3399-i2c",
483 .data = (ulong)&rk3399_soc_data,
484 },
Simon Glass34374692015-08-30 16:55:39 -0600485 { }
486};
487
Walter Lozanoe3e24702020-06-25 01:10:04 -0300488U_BOOT_DRIVER(rockchip_rk3066_i2c) = {
489 .name = "rockchip_rk3066_i2c",
Simon Glass34374692015-08-30 16:55:39 -0600490 .id = UCLASS_I2C,
491 .of_match = rockchip_i2c_ids,
Simon Glass930bc372016-01-21 19:43:42 -0700492 .ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata,
Simon Glass34374692015-08-30 16:55:39 -0600493 .probe = rockchip_i2c_probe,
494 .priv_auto_alloc_size = sizeof(struct rk_i2c),
495 .ops = &rockchip_i2c_ops,
496};
Walter Lozanoaddf3582020-06-25 01:10:06 -0300497
498U_BOOT_DRIVER_ALIAS(rockchip_rk3066_i2c, rockchip_rk3288_i2c)