blob: ebbd6f4aec6fa932eed58ca9dc22da0d7294bda3 [file] [log] [blame]
wdenkdc7c9a12003-03-26 06:55:25 +00001/*
2 * (C) Copyright 2002
3 * Lineo, Inc. <www.lineo.com>
4 * Bernhard Kuhn <bkuhn@lineo.com>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#include <common.h>
30
31ulong myflush(void);
32
33
wdenk2abbe072003-06-16 23:50:08 +000034/* Flash Organization Structure */
35typedef struct OrgDef
36{
37 unsigned int sector_number;
38 unsigned int sector_size;
39} OrgDef;
40
41
42/* Flash Organizations */
43OrgDef OrgAT49BV16x4[] =
44{
45 { 8, 8*1024 }, /* 8 * 8kBytes sectors */
wdenk8bde7f72003-06-27 21:31:46 +000046 { 2, 32*1024 }, /* 2 * 32kBytes sectors */
47 { 30, 64*1024 } /* 30 * 64kBytes sectors */
wdenk2abbe072003-06-16 23:50:08 +000048};
49
50OrgDef OrgAT49BV16x4A[] =
51{
wdenk8bde7f72003-06-27 21:31:46 +000052 { 8, 8*1024 }, /* 8 * 8kBytes sectors */
53 { 31, 64*1024 } /* 31 * 64kBytes sectors */
wdenk2abbe072003-06-16 23:50:08 +000054};
55
56
wdenkdc7c9a12003-03-26 06:55:25 +000057#define FLASH_BANK_SIZE 0x200000 /* 2 MB */
58#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
59
60flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
61
wdenk2abbe072003-06-16 23:50:08 +000062/* AT49BV1614A Codes */
63#define FLASH_CODE1 0xAA
64#define FLASH_CODE2 0x55
65#define ID_IN_CODE 0x90
66#define ID_OUT_CODE 0xF0
67
wdenkdc7c9a12003-03-26 06:55:25 +000068
69#define CMD_READ_ARRAY 0x00F0
70#define CMD_UNLOCK1 0x00AA
71#define CMD_UNLOCK2 0x0055
72#define CMD_ERASE_SETUP 0x0080
73#define CMD_ERASE_CONFIRM 0x0030
74#define CMD_PROGRAM 0x00A0
75#define CMD_UNLOCK_BYPASS 0x0020
76
77#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00005555<<1)))
78#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00002AAA<<1)))
79
wdenk2abbe072003-06-16 23:50:08 +000080#define IDENT_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x0000555<<1)))
81#define IDENT_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x0000AAA<<1)))
82
wdenkdc7c9a12003-03-26 06:55:25 +000083#define BIT_ERASE_DONE 0x0080
84#define BIT_RDY_MASK 0x0080
85#define BIT_PROGRAM_ERROR 0x0020
86#define BIT_TIMEOUT 0x80000000 /* our flag */
87
88#define READY 1
89#define ERR 2
90#define TMO 4
91
92/*-----------------------------------------------------------------------
93 */
wdenk2abbe072003-06-16 23:50:08 +000094void flash_identification (flash_info_t * info)
wdenkdc7c9a12003-03-26 06:55:25 +000095{
wdenk2abbe072003-06-16 23:50:08 +000096 volatile u16 manuf_code, device_code, add_device_code;
wdenkdc7c9a12003-03-26 06:55:25 +000097
wdenk2abbe072003-06-16 23:50:08 +000098 IDENT_FLASH_ADDR1 = FLASH_CODE1;
99 IDENT_FLASH_ADDR2 = FLASH_CODE2;
100 IDENT_FLASH_ADDR1 = ID_IN_CODE;
wdenkdc7c9a12003-03-26 06:55:25 +0000101
wdenk2abbe072003-06-16 23:50:08 +0000102 manuf_code = *(volatile u16 *) CFG_FLASH_BASE;
103 device_code = *(volatile u16 *) (CFG_FLASH_BASE + 2);
104 add_device_code = *(volatile u16 *) (CFG_FLASH_BASE + (3 << 1));
105
106 IDENT_FLASH_ADDR1 = FLASH_CODE1;
107 IDENT_FLASH_ADDR2 = FLASH_CODE2;
108 IDENT_FLASH_ADDR1 = ID_OUT_CODE;
109
110 /* Vendor type */
111 info->flash_id = ATM_MANUFACT & FLASH_VENDMASK;
112 printf ("Atmel: ");
113
114 if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV1614 & FLASH_TYPEMASK)) {
115
116 if ((add_device_code & FLASH_TYPEMASK) ==
117 (ATM_ID_BV1614A & FLASH_TYPEMASK)) {
118 info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK;
119 printf ("AT49BV1614A (16Mbit)\n");
wdenkdc7c9a12003-03-26 06:55:25 +0000120 }
121
wdenk2abbe072003-06-16 23:50:08 +0000122 } else { /* AT49BV1614 Flash */
123 info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK;
124 printf ("AT49BV1614 (16Mbit)\n");
wdenkdc7c9a12003-03-26 06:55:25 +0000125 }
wdenk2abbe072003-06-16 23:50:08 +0000126}
wdenkdc7c9a12003-03-26 06:55:25 +0000127
wdenkdc7c9a12003-03-26 06:55:25 +0000128
wdenk2abbe072003-06-16 23:50:08 +0000129ulong flash_init (void)
130{
131 int i, j, k;
132 unsigned int flash_nb_blocks, sector;
133 unsigned int start_address;
134 OrgDef *pOrgDef;
wdenkdc7c9a12003-03-26 06:55:25 +0000135
wdenk2abbe072003-06-16 23:50:08 +0000136 ulong size = 0;
137
138 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
139 ulong flashbase = 0;
140
141 flash_identification (&flash_info[i]);
142
143 flash_info[i].size = FLASH_BANK_SIZE;
144
145 if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
146 (ATM_ID_BV1614 & FLASH_TYPEMASK)) {
147 flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
148 memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
149
150 pOrgDef = OrgAT49BV16x4;
151 flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef);
152 } else { /* AT49BV1614A Flash */
153 flash_info[i].sector_count = CFG_MAX_FLASH_SECT - 1;
154 memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT - 1);
155
156 pOrgDef = OrgAT49BV16x4A;
157 flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof (OrgDef);
158 }
159
160 if (i == 0)
161 flashbase = PHYS_FLASH_1;
162 else
163 panic ("configured to many flash banks!\n");
164
165 sector = 0;
166 start_address = flashbase;
167
168 for (j = 0; j < flash_nb_blocks; j++) {
169 for (k = 0; k < pOrgDef[j].sector_number; k++) {
170 flash_info[i].start[sector++] = start_address;
171 start_address += pOrgDef[j].sector_size;
172 }
173 }
174
175 size += flash_info[i].size;
176 }
177
178 /* Protect binary boot image */
179 flash_protect (FLAG_PROTECT_SET,
180 CFG_FLASH_BASE,
181 CFG_FLASH_BASE + CFG_BOOT_SIZE - 1, &flash_info[0]);
182
183 /* Protect environment variables */
184 flash_protect (FLAG_PROTECT_SET,
185 CFG_ENV_ADDR,
186 CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
187
188 /* Protect U-Boot gzipped image */
189 flash_protect (FLAG_PROTECT_SET,
190 CFG_U_BOOT_BASE,
191 CFG_U_BOOT_BASE + CFG_U_BOOT_SIZE - 1, &flash_info[0]);
192
193 return size;
wdenkdc7c9a12003-03-26 06:55:25 +0000194}
195
196/*-----------------------------------------------------------------------
197 */
wdenk2abbe072003-06-16 23:50:08 +0000198void flash_print_info (flash_info_t * info)
wdenkdc7c9a12003-03-26 06:55:25 +0000199{
wdenk2abbe072003-06-16 23:50:08 +0000200 int i;
wdenkdc7c9a12003-03-26 06:55:25 +0000201
wdenk2abbe072003-06-16 23:50:08 +0000202 switch (info->flash_id & FLASH_VENDMASK) {
203 case (ATM_MANUFACT & FLASH_VENDMASK):
204 printf ("Atmel: ");
205 break;
206 default:
207 printf ("Unknown Vendor ");
208 break;
wdenkdc7c9a12003-03-26 06:55:25 +0000209 }
wdenkdc7c9a12003-03-26 06:55:25 +0000210
wdenk2abbe072003-06-16 23:50:08 +0000211 switch (info->flash_id & FLASH_TYPEMASK) {
212 case (ATM_ID_BV1614 & FLASH_TYPEMASK):
213 printf ("AT49BV1614 (16Mbit)\n");
214 break;
215 case (ATM_ID_BV1614A & FLASH_TYPEMASK):
216 printf ("AT49BV1614A (16Mbit)\n");
217 break;
218 default:
219 printf ("Unknown Chip Type\n");
220 goto Done;
221 break;
222 }
223
224 printf (" Size: %ld MB in %d Sectors\n",
225 info->size >> 20, info->sector_count);
226
227 printf (" Sector Start Addresses:");
228 for (i = 0; i < info->sector_count; i++) {
229 if ((i % 5) == 0) {
230 printf ("\n ");
231 }
232 printf (" %08lX%s", info->start[i],
233 info->protect[i] ? " (RO)" : " ");
234 }
235 printf ("\n");
236
237 Done:
wdenkdc7c9a12003-03-26 06:55:25 +0000238}
239
240/*-----------------------------------------------------------------------
241 */
242
wdenk2abbe072003-06-16 23:50:08 +0000243int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenkdc7c9a12003-03-26 06:55:25 +0000244{
wdenk2abbe072003-06-16 23:50:08 +0000245 ulong result;
246 int iflag, cflag, prot, sect;
247 int rc = ERR_OK;
248 int chip1;
wdenkdc7c9a12003-03-26 06:55:25 +0000249
wdenk2abbe072003-06-16 23:50:08 +0000250 /* first look for protection bits */
wdenkdc7c9a12003-03-26 06:55:25 +0000251
wdenk2abbe072003-06-16 23:50:08 +0000252 if (info->flash_id == FLASH_UNKNOWN)
253 return ERR_UNKNOWN_FLASH_TYPE;
wdenkdc7c9a12003-03-26 06:55:25 +0000254
wdenk2abbe072003-06-16 23:50:08 +0000255 if ((s_first < 0) || (s_first > s_last)) {
256 return ERR_INVAL;
wdenkdc7c9a12003-03-26 06:55:25 +0000257 }
wdenkdc7c9a12003-03-26 06:55:25 +0000258
wdenk2abbe072003-06-16 23:50:08 +0000259 if ((info->flash_id & FLASH_VENDMASK) !=
260 (ATM_MANUFACT & FLASH_VENDMASK)) {
261 return ERR_UNKNOWN_FLASH_VENDOR;
262 }
wdenkdc7c9a12003-03-26 06:55:25 +0000263
wdenk2abbe072003-06-16 23:50:08 +0000264 prot = 0;
265 for (sect = s_first; sect <= s_last; ++sect) {
266 if (info->protect[sect]) {
267 prot++;
wdenkdc7c9a12003-03-26 06:55:25 +0000268 }
wdenkdc7c9a12003-03-26 06:55:25 +0000269 }
wdenk2abbe072003-06-16 23:50:08 +0000270 if (prot)
271 return ERR_PROTECTED;
wdenkdc7c9a12003-03-26 06:55:25 +0000272
wdenk2abbe072003-06-16 23:50:08 +0000273 /*
274 * Disable interrupts which might cause a timeout
275 * here. Remember that our exception vectors are
276 * at address 0 in the flash, and we don't want a
277 * (ticker) exception to happen while the flash
278 * chip is in programming mode.
279 */
280 cflag = icache_status ();
281 icache_disable ();
282 iflag = disable_interrupts ();
283
284 /* Start erase on unprotected sectors */
285 for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
286 printf ("Erasing sector %2d ... ", sect);
287
288 /* arm simple, non interrupt dependent timer */
289 reset_timer_masked ();
290
291 if (info->protect[sect] == 0) { /* not protected */
292 volatile u16 *addr = (volatile u16 *) (info->start[sect]);
293
294 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
295 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
296 MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
297
298 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
299 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
300 *addr = CMD_ERASE_CONFIRM;
301
302 /* wait until flash is ready */
303 chip1 = 0;
304
305 do {
306 result = *addr;
307
308 /* check timeout */
309 if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
310 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
311 chip1 = TMO;
312 break;
313 }
314
315 if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
316 chip1 = READY;
317
318 } while (!chip1);
319
320 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
321
322 if (chip1 == ERR) {
323 rc = ERR_PROG_ERROR;
324 goto outahere;
325 }
326 if (chip1 == TMO) {
327 rc = ERR_TIMOUT;
328 goto outahere;
329 }
330
331 printf ("ok.\n");
332 } else { /* it was protected */
333 printf ("protected!\n");
334 }
335 }
336
337 if (ctrlc ())
338 printf ("User Interrupt!\n");
wdenkdc7c9a12003-03-26 06:55:25 +0000339
340outahere:
wdenk2abbe072003-06-16 23:50:08 +0000341 /* allow flash to settle - wait 10 ms */
342 udelay_masked (10000);
wdenkdc7c9a12003-03-26 06:55:25 +0000343
wdenk2abbe072003-06-16 23:50:08 +0000344 if (iflag)
345 enable_interrupts ();
wdenkdc7c9a12003-03-26 06:55:25 +0000346
wdenk2abbe072003-06-16 23:50:08 +0000347 if (cflag)
348 icache_enable ();
wdenkdc7c9a12003-03-26 06:55:25 +0000349
wdenk2abbe072003-06-16 23:50:08 +0000350 return rc;
wdenkdc7c9a12003-03-26 06:55:25 +0000351}
352
353/*-----------------------------------------------------------------------
354 * Copy memory to flash
355 */
356
wdenk2abbe072003-06-16 23:50:08 +0000357volatile static int write_word (flash_info_t * info, ulong dest,
358 ulong data)
wdenkdc7c9a12003-03-26 06:55:25 +0000359{
wdenk2abbe072003-06-16 23:50:08 +0000360 volatile u16 *addr = (volatile u16 *) dest;
361 ulong result;
362 int rc = ERR_OK;
363 int cflag, iflag;
364 int chip1;
wdenkdc7c9a12003-03-26 06:55:25 +0000365
wdenk2abbe072003-06-16 23:50:08 +0000366 /*
367 * Check if Flash is (sufficiently) erased
368 */
wdenkdc7c9a12003-03-26 06:55:25 +0000369 result = *addr;
wdenk2abbe072003-06-16 23:50:08 +0000370 if ((result & data) != data)
371 return ERR_NOT_ERASED;
wdenkdc7c9a12003-03-26 06:55:25 +0000372
wdenkdc7c9a12003-03-26 06:55:25 +0000373
wdenk2abbe072003-06-16 23:50:08 +0000374 /*
375 * Disable interrupts which might cause a timeout
376 * here. Remember that our exception vectors are
377 * at address 0 in the flash, and we don't want a
378 * (ticker) exception to happen while the flash
379 * chip is in programming mode.
380 */
381 cflag = icache_status ();
382 icache_disable ();
383 iflag = disable_interrupts ();
wdenkdc7c9a12003-03-26 06:55:25 +0000384
wdenk2abbe072003-06-16 23:50:08 +0000385 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
386 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
387 MEM_FLASH_ADDR1 = CMD_PROGRAM;
388 *addr = data;
wdenkdc7c9a12003-03-26 06:55:25 +0000389
wdenk2abbe072003-06-16 23:50:08 +0000390 /* arm simple, non interrupt dependent timer */
391 reset_timer_masked ();
wdenkdc7c9a12003-03-26 06:55:25 +0000392
wdenk2abbe072003-06-16 23:50:08 +0000393 /* wait until flash is ready */
394 chip1 = 0;
395 do {
396 result = *addr;
wdenkdc7c9a12003-03-26 06:55:25 +0000397
wdenk2abbe072003-06-16 23:50:08 +0000398 /* check timeout */
399 if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
400 chip1 = ERR | TMO;
401 break;
402 }
403 if (!chip1 && ((result & 0x80) == (data & 0x80)))
404 chip1 = READY;
wdenkdc7c9a12003-03-26 06:55:25 +0000405
wdenk2abbe072003-06-16 23:50:08 +0000406 } while (!chip1);
407
408 *addr = CMD_READ_ARRAY;
409
410 if (chip1 == ERR || *addr != data)
411 rc = ERR_PROG_ERROR;
412
413 if (iflag)
414 enable_interrupts ();
415
416 if (cflag)
417 icache_enable ();
418
419 return rc;
wdenkdc7c9a12003-03-26 06:55:25 +0000420}
421
422/*-----------------------------------------------------------------------
423 * Copy memory to flash.
424 */
425
wdenk2abbe072003-06-16 23:50:08 +0000426int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenkdc7c9a12003-03-26 06:55:25 +0000427{
wdenk2abbe072003-06-16 23:50:08 +0000428 ulong wp, data;
429 int rc;
wdenkdc7c9a12003-03-26 06:55:25 +0000430
wdenk2abbe072003-06-16 23:50:08 +0000431 if (addr & 1) {
432 printf ("unaligned destination not supported\n");
433 return ERR_ALIGN;
434 };
wdenkdc7c9a12003-03-26 06:55:25 +0000435
wdenk2abbe072003-06-16 23:50:08 +0000436 if ((int) src & 1) {
437 printf ("unaligned source not supported\n");
438 return ERR_ALIGN;
439 };
wdenkdc7c9a12003-03-26 06:55:25 +0000440
wdenk2abbe072003-06-16 23:50:08 +0000441 wp = addr;
wdenkdc7c9a12003-03-26 06:55:25 +0000442
wdenk2abbe072003-06-16 23:50:08 +0000443 while (cnt >= 2) {
444 data = *((volatile u16 *) src);
445 if ((rc = write_word (info, wp, data)) != 0) {
446 return (rc);
447 }
448 src += 2;
449 wp += 2;
450 cnt -= 2;
wdenkdc7c9a12003-03-26 06:55:25 +0000451 }
wdenkdc7c9a12003-03-26 06:55:25 +0000452
wdenk2abbe072003-06-16 23:50:08 +0000453 if (cnt == 1) {
454 data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) <<
455 8);
456 if ((rc = write_word (info, wp, data)) != 0) {
457 return (rc);
458 }
459 src += 1;
460 wp += 1;
461 cnt -= 1;
462 };
wdenkdc7c9a12003-03-26 06:55:25 +0000463
wdenk2abbe072003-06-16 23:50:08 +0000464 return ERR_OK;
wdenkdc7c9a12003-03-26 06:55:25 +0000465}