blob: fc0e8d252b75970da7a593b381824b5d6785891b [file] [log] [blame]
Chander Kashyape21185b2011-05-24 20:02:56 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Chander Kashyape21185b2011-05-24 20:02:56 +00005 */
6
7#include <common.h>
Simon Glass903fd792014-10-20 19:48:37 -06008#include <asm/gpio.h>
Chander Kashyape21185b2011-05-24 20:02:56 +00009#include <asm/io.h>
10#include <netdev.h>
11#include <asm/arch/cpu.h>
Chander Kashyape21185b2011-05-24 20:02:56 +000012#include <asm/arch/mmc.h>
Rajeshwari Shinde198a40b2013-07-04 12:29:16 +053013#include <asm/arch/periph.h>
14#include <asm/arch/pinmux.h>
Chander Kashyape21185b2011-05-24 20:02:56 +000015#include <asm/arch/sromc.h>
16
17DECLARE_GLOBAL_DATA_PTR;
Chander Kashyape21185b2011-05-24 20:02:56 +000018
19static void smc9115_pre_init(void)
20{
21 u32 smc_bw_conf, smc_bc_conf;
22
23 /* gpio configuration GPK0CON */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +053024 gpio_cfg_pin(EXYNOS4_GPIO_Y00 + CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2));
Chander Kashyape21185b2011-05-24 20:02:56 +000025
26 /* Ethernet needs bus width of 16 bits */
27 smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
28 smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
29 | SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
30 | SROMC_BC_TAH(0x0F) | SROMC_BC_TACP(0x0F)
31 | SROMC_BC_PMC(0x0F);
32
33 /* Select and configure the SROMC bank */
34 s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
35}
36
37int board_init(void)
38{
Chander Kashyape21185b2011-05-24 20:02:56 +000039 smc9115_pre_init();
40
Chander Kashyape21185b2011-05-24 20:02:56 +000041 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
42 return 0;
43}
44
45int dram_init(void)
46{
47 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
48 + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
49 + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
50 + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
51
52 return 0;
53}
54
55void dram_init_banksize(void)
56{
57 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
Minkyu Kang6b949ba2015-10-23 15:59:37 +090058 gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
Chander Kashyap9436a0c2011-09-20 21:25:02 +000059 PHYS_SDRAM_1_SIZE);
Chander Kashyape21185b2011-05-24 20:02:56 +000060 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
Minkyu Kang6b949ba2015-10-23 15:59:37 +090061 gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
Chander Kashyap9436a0c2011-09-20 21:25:02 +000062 PHYS_SDRAM_2_SIZE);
Chander Kashyape21185b2011-05-24 20:02:56 +000063 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
Minkyu Kang6b949ba2015-10-23 15:59:37 +090064 gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
Chander Kashyap9436a0c2011-09-20 21:25:02 +000065 PHYS_SDRAM_3_SIZE);
Chander Kashyape21185b2011-05-24 20:02:56 +000066 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
Minkyu Kang6b949ba2015-10-23 15:59:37 +090067 gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
Chander Kashyap9436a0c2011-09-20 21:25:02 +000068 PHYS_SDRAM_4_SIZE);
Chander Kashyape21185b2011-05-24 20:02:56 +000069}
70
71int board_eth_init(bd_t *bis)
72{
73 int rc = 0;
74#ifdef CONFIG_SMC911X
75 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
76#endif
77 return rc;
78}
79
80#ifdef CONFIG_DISPLAY_BOARDINFO
81int checkboard(void)
82{
83 printf("\nBoard: SMDKV310\n");
84 return 0;
85}
86#endif
87
88#ifdef CONFIG_GENERIC_MMC
89int board_mmc_init(bd_t *bis)
90{
91 int i, err;
92
93 /*
94 * MMC2 SD card GPIO:
95 *
96 * GPK2[0] SD_2_CLK(2)
97 * GPK2[1] SD_2_CMD(2)
98 * GPK2[2] SD_2_CDn
99 * GPK2[3:6] SD_2_DATA[0:3](2)
100 */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530101 for (i = EXYNOS4_GPIO_K20; i < EXYNOS4_GPIO_K27; i++) {
Chander Kashyape21185b2011-05-24 20:02:56 +0000102 /* GPK2[0:6] special function 2 */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530103 gpio_cfg_pin(i, S5P_GPIO_FUNC(0x2));
Chander Kashyape21185b2011-05-24 20:02:56 +0000104
105 /* GPK2[0:6] drv 4x */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530106 gpio_set_drv(i, S5P_GPIO_DRV_4X);
Chander Kashyape21185b2011-05-24 20:02:56 +0000107
108 /* GPK2[0:1] pull disable */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530109 if (i == EXYNOS4_GPIO_K20 || i == EXYNOS4_GPIO_K21) {
110 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
Chander Kashyape21185b2011-05-24 20:02:56 +0000111 continue;
112 }
113
114 /* GPK2[2:6] pull up */
Akshay Saraswatf6ae1ca2014-05-13 10:30:14 +0530115 gpio_set_pull(i, S5P_GPIO_PULL_UP);
Chander Kashyape21185b2011-05-24 20:02:56 +0000116 }
117 err = s5p_mmc_init(2, 4);
118 return err;
119}
120#endif
Rajeshwari Shinde198a40b2013-07-04 12:29:16 +0530121
122static int board_uart_init(void)
123{
124 int err;
125
126 err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
127 if (err) {
128 debug("UART0 not configured\n");
129 return err;
130 }
131
132 err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
133 if (err) {
134 debug("UART1 not configured\n");
135 return err;
136 }
137
138 err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
139 if (err) {
140 debug("UART2 not configured\n");
141 return err;
142 }
143
144 err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
145 if (err) {
146 debug("UART3 not configured\n");
147 return err;
148 }
149
150 return 0;
151}
152
153#ifdef CONFIG_BOARD_EARLY_INIT_F
154int board_early_init_f(void)
155{
156 int err;
157 err = board_uart_init();
158 if (err) {
159 debug("UART init failed\n");
160 return err;
161 }
162 return err;
163}
164#endif