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Michael Schwingenbc243452008-01-16 19:51:55 +01001/*
2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * Configuration settings for the AcTux-3 board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29#define CONFIG_IXP425 1
30#define CONFIG_ACTUX3 1
31
32#define CONFIG_DISPLAY_CPUINFO 1
33#define CONFIG_DISPLAY_BOARDINFO 1
34
Jean-Christophe PLAGNIOL-VILLARD930590f2009-01-31 09:10:48 +010035#define CONFIG_IXP_SERIAL
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020036#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
Michael Schwingenbc243452008-01-16 19:51:55 +010037#define CONFIG_BAUDRATE 115200
38#define CONFIG_BOOTDELAY 3
39#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
40
41/***************************************************************
42 * U-boot generic defines start here.
43 ***************************************************************/
44#undef CONFIG_USE_IRQ
45
46/* Size of malloc() pool */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020047#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
Michael Schwingenbc243452008-01-16 19:51:55 +010048/* size in bytes reserved for initial data */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049#define CONFIG_SYS_GBL_DATA_SIZE 128
Michael Schwingenbc243452008-01-16 19:51:55 +010050
51/* allow to overwrite serial and ethaddr */
52#define CONFIG_ENV_OVERWRITE
53
54/* Command line configuration. */
55#include <config_cmd_default.h>
56
57#define CONFIG_CMD_ELF
58
59#define CONFIG_BOOTCOMMAND "run boot_flash"
60/* enable passing of ATAGs */
61#define CONFIG_CMDLINE_TAG 1
62#define CONFIG_SETUP_MEMORY_TAGS 1
63#define CONFIG_INITRD_TAG 1
64#define CONFIG_REVISION_TAG 1
65
66#if defined(CONFIG_CMD_KGDB)
67# define CONFIG_KGDB_BAUDRATE 230400
68/* which serial port to use */
69# define CONFIG_KGDB_SER_INDEX 1
70#endif
71
72/* Miscellaneous configurable options */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020073#define CONFIG_SYS_LONGHELP
74#define CONFIG_SYS_PROMPT "=> "
Michael Schwingenbc243452008-01-16 19:51:55 +010075/* Console I/O Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076#define CONFIG_SYS_CBSIZE 256
Michael Schwingenbc243452008-01-16 19:51:55 +010077/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
Michael Schwingenbc243452008-01-16 19:51:55 +010079/* max number of command args */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020080#define CONFIG_SYS_MAXARGS 16
Michael Schwingenbc243452008-01-16 19:51:55 +010081/* Boot Argument Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Michael Schwingenbc243452008-01-16 19:51:55 +010083
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020084#define CONFIG_SYS_MEMTEST_START 0x00400000
85#define CONFIG_SYS_MEMTEST_END 0x00800000
Michael Schwingenbc243452008-01-16 19:51:55 +010086
Michael Schwingenbc243452008-01-16 19:51:55 +010087/* spec says 66.666 MHz, but it appears to be 33 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020088#define CONFIG_SYS_HZ 3333333
Michael Schwingenbc243452008-01-16 19:51:55 +010089
90/* default load address */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020091#define CONFIG_SYS_LOAD_ADDR 0x00010000
Michael Schwingenbc243452008-01-16 19:51:55 +010092
93/* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020094#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
Michael Schwingenbc243452008-01-16 19:51:55 +010095 115200, 230400 }
96#define CONFIG_SERIAL_RTS_ACTIVE 1
97
98/*
99 * Stack sizes
100 *
101 * The stack sizes are set up in start.S using the settings below
102 */
103#define CONFIG_STACKSIZE (128*1024) /* regular stack */
104#ifdef CONFIG_USE_IRQ
105# define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
106# define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
107#endif
108
109/* Expansion bus settings */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200110#define CONFIG_SYS_EXP_CS0 0xbd113442
Michael Schwingenbc243452008-01-16 19:51:55 +0100111
112/* SDRAM settings */
113#define CONFIG_NR_DRAM_BANKS 1
114#define PHYS_SDRAM_1 0x00000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_DRAM_BASE 0x00000000
Michael Schwingenbc243452008-01-16 19:51:55 +0100116
117/* 16MB SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#define CONFIG_SYS_SDR_CONFIG 0x3A
Michael Schwingenbc243452008-01-16 19:51:55 +0100119#define PHYS_SDRAM_1_SIZE 0x01000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200120#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
121#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
122#define CONFIG_SYS_DRAM_SIZE 0x01000000
Michael Schwingenbc243452008-01-16 19:51:55 +0100123
124/* FLASH organization */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200125#define CONFIG_SYS_MAX_FLASH_BANKS 1
Michael Schwingenbc243452008-01-16 19:51:55 +0100126/* max number of sectors on one chip */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127#define CONFIG_SYS_MAX_FLASH_SECT 140
Michael Schwingenbc243452008-01-16 19:51:55 +0100128#define PHYS_FLASH_1 0x50000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
Michael Schwingenbc243452008-01-16 19:51:55 +0100130
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
132#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
133#define CONFIG_SYS_MONITOR_LEN (256 << 10)
Michael Schwingenbc243452008-01-16 19:51:55 +0100134
135/* Use common CFI driver */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200136#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200137#define CONFIG_FLASH_CFI_DRIVER
Michael Schwingenbc243452008-01-16 19:51:55 +0100138/* no byte writes on IXP4xx */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200139#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
Michael Schwingenbc243452008-01-16 19:51:55 +0100140
141/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142#define CONFIG_SYS_FLASH_EMPTY_INFO
Michael Schwingenbc243452008-01-16 19:51:55 +0100143
144/* Ethernet */
145
146/* include IXP4xx NPE support */
147#define CONFIG_IXP4XX_NPE 1
Michael Schwingenbc243452008-01-16 19:51:55 +0100148
149#define CONFIG_NET_MULTI 1
150/* NPE0 PHY address */
151#define CONFIG_PHY_ADDR 0x10
152/* MII PHY management */
153#define CONFIG_MII 1
154/* Number of ethernet rx buffers & descriptors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_SYS_RX_ETH_BUFFER 16
Michael Schwingenbc243452008-01-16 19:51:55 +0100156#define CONFIG_RESET_PHY_R 1
157/* ethernet switch connected to MII port */
158#define CONFIG_MII_ETHSWITCH 1
159
160#define CONFIG_CMD_DHCP
161#define CONFIG_CMD_NET
162#define CONFIG_CMD_MII
163#define CONFIG_CMD_PING
164#undef CONFIG_CMD_NFS
165
166/* BOOTP options */
167#define CONFIG_BOOTP_BOOTFILESIZE
168#define CONFIG_BOOTP_BOOTPATH
169#define CONFIG_BOOTP_GATEWAY
170#define CONFIG_BOOTP_HOSTNAME
171
172/* Cache Configuration */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173#define CONFIG_SYS_CACHELINE_SIZE 32
Michael Schwingenbc243452008-01-16 19:51:55 +0100174
175/*
176 * environment organization:
177 * one flash sector, embedded in uboot area (bottom bootblock flash)
178 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200179#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200180#define CONFIG_ENV_SIZE 0x2000
181#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200182#define CONFIG_SYS_USE_PPCENV 1
Michael Schwingenbc243452008-01-16 19:51:55 +0100183
184#define CONFIG_EXTRA_ENV_SETTINGS \
Jean-Christophe PLAGNIOL-VILLARDb4e2f892009-01-31 09:53:39 +0100185 "npe_ucode=50040000\0" \
Michael Schwingenbc243452008-01-16 19:51:55 +0100186 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
187 "kerneladdr=50050000\0" \
188 "rootaddr=50170000\0" \
189 "loadaddr=10000\0" \
190 "updateboot_ser=mw.b 10000 ff 40000;" \
191 " loady ${loadaddr};" \
192 " run eraseboot writeboot\0" \
193 "updateboot_net=mw.b 10000 ff 40000;" \
194 " tftp ${loadaddr} u-boot.bin;" \
195 " run eraseboot writeboot\0" \
196 "eraseboot=protect off 50000000 50003fff;" \
197 " protect off 50006000 5003ffff;" \
198 " erase 50000000 50003fff;" \
199 " erase 50006000 5003ffff\0" \
200 "writeboot=cp.b 10000 50000000 4000;" \
201 " cp.b 16000 50006000 3a000\0" \
202 "eraseenv=protect off 50004000 50005fff;" \
203 " erase 50004000 50005fff\0" \
204 "updateroot=tftp ${loadaddr} ${rootfile};" \
205 " era ${rootaddr} +${filesize};" \
206 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
207 "updatekern=tftp ${loadaddr} ${kernelfile};" \
208 " era ${kerneladdr} +${filesize};" \
209 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
210 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
211 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
212 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
213 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
214 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
215 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
216 "boot_flash=run flashargs addtty addeth;" \
217 " bootm ${kerneladdr}\0" \
218 "boot_net=run netargs addtty addeth;" \
219 " tftpboot ${loadaddr} ${kernelfile};" \
220 " bootm\0"
221
222#endif /* __CONFIG_H */