| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| Tom Rini | 3a64940 | 2017-03-18 09:01:44 -0400 | [diff] [blame] | 2 | CONFIG_SYS_THUMB_BUILD=y |
| Stefan Agner | 7966b43 | 2017-03-13 18:41:36 -0700 | [diff] [blame] | 3 | CONFIG_ARCH_VF610=y |
| Tom Rini | 278b90c | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 4 | CONFIG_SYS_TEXT_BASE=0x3f401000 |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 5 | CONFIG_TARGET_BK4R1=y |
| Tom Rini | 86cf1c8 | 2018-08-16 08:16:24 -0400 | [diff] [blame] | 6 | CONFIG_NR_DRAM_BANKS=1 |
| Simon Glass | 2be2965 | 2017-07-23 21:19:39 -0600 | [diff] [blame] | 7 | CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg" |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 8 | CONFIG_BOOTDELAY=3 |
| Simon Glass | a5d6754 | 2017-01-23 13:31:20 -0700 | [diff] [blame] | 9 | CONFIG_BOARD_EARLY_INIT_F=y |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 10 | CONFIG_HUSH_PARSER=y |
| 11 | CONFIG_CMD_BOOTZ=y |
| Simon Glass | a1dc980 | 2017-05-17 03:25:10 -0600 | [diff] [blame] | 12 | CONFIG_CMD_EEPROM=y |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 13 | CONFIG_CMD_MEMTEST=y |
| Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 14 | CONFIG_CMD_GPIO=y |
| 15 | CONFIG_CMD_I2C=y |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 16 | CONFIG_CMD_MMC=y |
| Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 17 | CONFIG_CMD_NAND_TRIMFFS=y |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 18 | CONFIG_CMD_SF=y |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 19 | CONFIG_CMD_DHCP=y |
| 20 | CONFIG_CMD_MII=y |
| 21 | CONFIG_CMD_PING=y |
| Chris Packham | c9032ce | 2017-04-29 15:20:28 +1200 | [diff] [blame] | 22 | CONFIG_CMD_DATE=y |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 23 | CONFIG_CMD_FAT=y |
| Tom Rini | 43ede0b | 2017-10-22 17:55:07 -0400 | [diff] [blame] | 24 | CONFIG_MTDIDS_DEFAULT="nand0=NAND,nor0=NOR" |
| 25 | CONFIG_MTDPARTS_DEFAULT="mtdparts=NAND:640k(bootloader),128k(env1),128k(env2),128k(dtb),6144k(kernel),-(root);NOR:-(nor)" |
| Simon Glass | ef26d60 | 2016-10-17 20:12:37 -0600 | [diff] [blame] | 26 | CONFIG_CMD_UBI=y |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 27 | CONFIG_OF_CONTROL=y |
| Tom Rini | 8c5cad0 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 28 | CONFIG_DEFAULT_DEVICE_TREE="bk4r1" |
| Tom Rini | 5dc4dfd | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 29 | CONFIG_ENV_IS_IN_NAND=y |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 30 | CONFIG_DM=y |
| 31 | CONFIG_DM_GPIO=y |
| 32 | CONFIG_VYBRID_GPIO=y |
| Mario Six | 07dea2e | 2018-03-28 14:38:19 +0200 | [diff] [blame] | 33 | CONFIG_FSL_ESDHC=y |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 34 | CONFIG_NAND_VF610_NFC=y |
| 35 | CONFIG_SYS_NAND_BUSWIDTH_16BIT=y |
| Albert ARIBAUD \(3ADEV\) | 27192d1 | 2016-09-26 09:08:08 +0200 | [diff] [blame] | 36 | CONFIG_DM_SPI_FLASH=y |
| 37 | CONFIG_SPI_FLASH=y |
| 38 | CONFIG_SPI_FLASH_STMICRO=y |
| 39 | CONFIG_SPI_FLASH_MTD=y |
| Alexandru Gagniuc | 3146f0c | 2017-08-01 17:19:59 -0700 | [diff] [blame] | 40 | CONFIG_PHYLIB=y |
| Alexandru Gagniuc | da3b9e7 | 2017-08-01 17:20:00 -0700 | [diff] [blame] | 41 | CONFIG_PHY_MICREL=y |
| Adam Ford | d7869b2 | 2018-07-20 23:03:57 -0500 | [diff] [blame] | 42 | CONFIG_MII=y |
| Lukasz Majewski | d27db67 | 2018-11-22 14:54:31 +0100 | [diff] [blame] | 43 | CONFIG_RTC_M41T62=y |
| Simon Glass | ef26d60 | 2016-10-17 20:12:37 -0600 | [diff] [blame] | 44 | CONFIG_DM_SERIAL=y |
| 45 | CONFIG_FSL_LPUART=y |
| Adam Ford | f1b1f77 | 2018-04-15 13:51:26 -0400 | [diff] [blame] | 46 | CONFIG_SPI=y |
| Simon Glass | ef26d60 | 2016-10-17 20:12:37 -0600 | [diff] [blame] | 47 | CONFIG_DM_SPI=y |
| 48 | CONFIG_FSL_QSPI=y |