Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Nishanth Menon | c616a0d | 2015-03-09 17:11:59 -0500 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Texas Insturments |
Nishanth Menon | c616a0d | 2015-03-09 17:11:59 -0500 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /* |
| 7 | * CP15 specific code |
| 8 | */ |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <command.h> |
| 12 | #include <asm/system.h> |
| 13 | #include <asm/cache.h> |
| 14 | #include <asm/armv7.h> |
| 15 | #include <linux/compiler.h> |
| 16 | |
| 17 | void __weak v7_arch_cp15_set_l2aux_ctrl(u32 l2actlr, u32 cpu_midr, |
| 18 | u32 cpu_rev_comb, u32 cpu_variant, |
| 19 | u32 cpu_rev) |
| 20 | { |
| 21 | asm volatile ("mcr p15, 1, %0, c15, c0, 0\n\t" : : "r"(l2actlr)); |
| 22 | } |
Nishanth Menon | b45c48a | 2015-03-09 17:12:00 -0500 | [diff] [blame] | 23 | |
| 24 | void __weak v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb, |
| 25 | u32 cpu_variant, u32 cpu_rev) |
| 26 | { |
| 27 | asm volatile ("mcr p15, 0, %0, c1, c0, 1\n\t" : : "r"(acr)); |
| 28 | } |