| Lukasz Majewski | ee94365 | 2018-04-26 15:07:18 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2018 |
| 3 | * Lukasz Majewski, DENX Software Engineering, lukma@denx.de |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ or X11 |
| 6 | */ |
| 7 | |
| 8 | /dts-v1/; |
| 9 | #include <dt-bindings/gpio/gpio.h> |
| 10 | #include "imx53.dtsi" |
| 11 | #include "imx53-pinfunc.h" |
| 12 | |
| 13 | / { |
| 14 | model = "K+P iMX53"; |
| 15 | compatible = "kp,imx53-kp", "fsl,imx53"; |
| 16 | |
| 17 | chosen { |
| 18 | stdout-path = &uart2; |
| 19 | }; |
| 20 | }; |
| 21 | |
| 22 | &fec { |
| 23 | pinctrl-names = "default"; |
| 24 | pinctrl-0 = <&pinctrl_eth>; |
| 25 | phy-mode = "rmii"; |
| 26 | phy-reset-gpios = <&gpio7 6 0>; |
| 27 | status = "okay"; |
| 28 | }; |
| 29 | |
| 30 | &i2c2 { |
| 31 | pinctrl-names = "default", "gpio"; |
| 32 | pinctrl-0 = <&pinctrl_i2c2>; |
| 33 | pinctrl-1 = <&pinctrl_i2c2_gpio>; |
| 34 | clock_frequency = <100000>; |
| 35 | |
| 36 | scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; |
| 37 | sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; |
| 38 | |
| 39 | status = "okay"; |
| 40 | |
| 41 | pmic: mc34708@8 { |
| 42 | compatible = "fsl,mc34708"; |
| 43 | reg = <0x8>; |
| 44 | }; |
| 45 | }; |
| 46 | |
| 47 | &i2c3 { |
| 48 | pinctrl-names = "default", "gpio"; |
| 49 | pinctrl-0 = <&pinctrl_i2c3>; |
| 50 | pinctrl-1 = <&pinctrl_i2c3_gpio>; |
| 51 | clock_frequency = <100000>; |
| 52 | |
| 53 | scl-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; |
| 54 | sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; |
| 55 | |
| 56 | status = "okay"; |
| 57 | }; |
| 58 | |
| 59 | &iomuxc { |
| 60 | pinctrl-names = "default"; |
| 61 | pinctrl-0 = <&pinctrl_hog>; |
| 62 | |
| 63 | imx53-kp { |
| 64 | pinctrl_eth: ethgrp { |
| 65 | fsl,pins = < |
| 66 | MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc |
| 67 | MX53_PAD_FEC_MDC__FEC_MDC 0x4 |
| 68 | MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180 |
| 69 | MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180 |
| 70 | MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4 |
| 71 | MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4 |
| 72 | MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4 |
| 73 | MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180 |
| 74 | /* The RX_ER pin needs to be pull down */ |
| 75 | /* for this device */ |
| 76 | MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x1c0 |
| 77 | MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180 |
| 78 | >; |
| 79 | }; |
| 80 | |
| 81 | pinctrl_hog: hoggrp { |
| 82 | fsl,pins = < |
| 83 | /* PHY RESET */ |
| 84 | MX53_PAD_PATA_DA_0__GPIO7_6 0x182 |
| 85 | /* VBUS_PWR_EN */ |
| 86 | MX53_PAD_PATA_DA_2__GPIO7_8 0x1e4 |
| 87 | /* BOOSTER_OFF */ |
| 88 | MX53_PAD_EIM_CS0__GPIO2_23 0x1e4 |
| 89 | >; |
| 90 | }; |
| 91 | |
| 92 | pinctrl_i2c2: i2c2grp { |
| 93 | fsl,pins = < |
| 94 | MX53_PAD_KEY_ROW3__I2C2_SDA |
| 95 | (0x1ee | IMX_PAD_SION) |
| 96 | MX53_PAD_KEY_COL3__I2C2_SCL |
| 97 | (0x1ee | IMX_PAD_SION) |
| 98 | >; |
| 99 | }; |
| 100 | |
| 101 | pinctrl_i2c2_gpio: i2c2grpgpio { |
| 102 | fsl,pins = < |
| 103 | MX53_PAD_KEY_ROW3__GPIO4_13 0x1e4 |
| 104 | MX53_PAD_KEY_COL3__GPIO4_12 0x1e4 |
| 105 | >; |
| 106 | }; |
| 107 | |
| 108 | pinctrl_i2c3: i2c3grp { |
| 109 | fsl,pins = < |
| 110 | MX53_PAD_GPIO_6__I2C3_SDA (0x1ee | IMX_PAD_SION) |
| 111 | MX53_PAD_GPIO_5__I2C3_SCL (0x1ee | IMX_PAD_SION) |
| 112 | >; |
| 113 | }; |
| 114 | |
| 115 | pinctrl_i2c3_gpio: i2c3grpgpio { |
| 116 | fsl,pins = < |
| 117 | MX53_PAD_GPIO_6__GPIO1_6 0x1e4 |
| 118 | MX53_PAD_GPIO_5__GPIO1_5 0x1e4 |
| 119 | >; |
| 120 | }; |
| 121 | |
| 122 | pinctrl_uart2: uart2grp { |
| 123 | fsl,pins = < |
| 124 | MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4 |
| 125 | MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4 |
| 126 | >; |
| 127 | }; |
| 128 | }; |
| 129 | }; |
| 130 | |
| 131 | &uart2 { |
| 132 | pinctrl-names = "default"; |
| 133 | pinctrl-0 = <&pinctrl_uart2>; |
| 134 | status = "okay"; |
| 135 | }; |