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Heiko Schocher67fa8c22010-02-22 16:43:02 +05301/*
2 * (C) Copyright 2009
3 * Marvell Semiconductor <www.marvell.com>
4 * Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * (C) Copyright 2009
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 *
Holger Brunck8170aef2012-07-05 05:37:46 +00009 * (C) Copyright 2011-2012
10 * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
11 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
Holger Brunck83b40c32011-06-16 18:11:15 +053012 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020013 * SPDX-License-Identifier: GPL-2.0+
Heiko Schocher67fa8c22010-02-22 16:43:02 +053014 */
15
16/*
17 * for linking errors see
18 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
19 */
20
Holger Brunck83b40c32011-06-16 18:11:15 +053021#ifndef _CONFIG_KM_KIRKWOOD_H
22#define _CONFIG_KM_KIRKWOOD_H
Heiko Schocher67fa8c22010-02-22 16:43:02 +053023
Holger Brunck48ced622012-07-05 05:05:06 +000024/* KM_KIRKWOOD */
Holger Brunck8170aef2012-07-05 05:37:46 +000025#if defined(CONFIG_KM_KIRKWOOD)
26#define CONFIG_IDENT_STRING "\nKeymile Kirkwood"
Holger Brunckd9354532012-07-05 05:05:02 +000027#define CONFIG_HOSTNAME km_kirkwood
Holger Brunck48ced622012-07-05 05:05:06 +000028#define CONFIG_KM_DISABLE_PCIE
Heiko Schocherf3e93612012-10-25 11:07:00 +020029#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunck48ced622012-07-05 05:05:06 +000030
31/* KM_KIRKWOOD_PCI */
Holger Brunck8170aef2012-07-05 05:37:46 +000032#elif defined(CONFIG_KM_KIRKWOOD_PCI)
33#define CONFIG_IDENT_STRING "\nKeymile Kirkwood PCI"
Holger Brunckd9354532012-07-05 05:05:02 +000034#define CONFIG_HOSTNAME km_kirkwood_pci
Heiko Schocherf3e93612012-10-25 11:07:00 +020035#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunck48ced622012-07-05 05:05:06 +000036#define CONFIG_KM_FPGA_CONFIG
Holger Brunck58c90c82014-08-15 10:51:48 +020037#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
38#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
Holger Brunck48ced622012-07-05 05:05:06 +000039
Karlheinz Jerg5e4eeab2013-09-18 09:32:48 +020040/* KM_KIRKWOOD_128M16 */
41#elif defined(CONFIG_KM_KIRKWOOD_128M16)
42#define CONFIG_IDENT_STRING "\nKeymile Kirkwood 128M16"
43#define CONFIG_HOSTNAME km_kirkwood_128m16
44#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamada4ab3fc52014-03-11 11:05:17 +090045#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Karlheinz Jerg5e4eeab2013-09-18 09:32:48 +020046#define CONFIG_KM_DISABLE_PCIE
Holger Bruncke28d4a22013-10-07 15:10:03 +020047#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Karlheinz Jerg5e4eeab2013-09-18 09:32:48 +020048
Gerlando Falauto9c134e12014-02-13 16:43:00 +010049/* KM_NUSA / KM_SUGP1 */
50#elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1)
Heiko Schocherf3e93612012-10-25 11:07:00 +020051#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Gerlando Falauto9c134e12014-02-13 16:43:00 +010052
53# if defined(CONFIG_KM_NUSA)
Holger Brunck8170aef2012-07-05 05:37:46 +000054#define CONFIG_IDENT_STRING "\nKeymile NUSA"
Holger Brunckd9354532012-07-05 05:05:02 +000055#define CONFIG_HOSTNAME kmnusa
Gerlando Falauto9c134e12014-02-13 16:43:00 +010056# elif defined(CONFIG_KM_SUGP1)
57#define CONFIG_IDENT_STRING "\nKeymile SUGP1"
58#define CONFIG_HOSTNAME kmsugp1
59#define KM_PCIE_RESET_MPP7
60#endif
61
Holger Brunck8170aef2012-07-05 05:37:46 +000062#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamada4ab3fc52014-03-11 11:05:17 +090063#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Holger Brunck8170aef2012-07-05 05:37:46 +000064#define CONFIG_KM_ENV_IS_IN_SPI_NOR
65#define CONFIG_KM_FPGA_CONFIG
66#define CONFIG_KM_PIGGY4_88E6352
Valentin Longchampbe3e8be2012-08-16 01:25:20 +000067#define CONFIG_MV88E6352_SWITCH
68#define CONFIG_KM_MVEXTSW_ADDR 0x10
Holger Brunck8170aef2012-07-05 05:37:46 +000069
Holger Brunckf9454392012-07-05 05:05:03 +000070/* KM_MGCOGE3UN */
71#elif defined(CONFIG_KM_MGCOGE3UN)
72#define CONFIG_IDENT_STRING "\nKeymile COGE3UN"
73#define CONFIG_HOSTNAME mgcoge3un
Heiko Schocherf3e93612012-10-25 11:07:00 +020074#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckf9454392012-07-05 05:05:03 +000075#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamada4ab3fc52014-03-11 11:05:17 +090076#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
Holger Brunckf9454392012-07-05 05:05:03 +000077#define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0"
78#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3
79#define CONFIG_KM_DISABLE_PCIE
80#define CONFIG_KM_PIGGY4_88E6061
81
82/* KMCOGE5UN */
Holger Brunckd9354532012-07-05 05:05:02 +000083#elif defined(CONFIG_KM_COGE5UN)
84#define CONFIG_IDENT_STRING "\nKeymile COGE5UN"
Heiko Schocherf3e93612012-10-25 11:07:00 +020085#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckd9354532012-07-05 05:05:02 +000086#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamada4ab3fc52014-03-11 11:05:17 +090087#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
Holger Brunckd9354532012-07-05 05:05:02 +000088#define CONFIG_KM_ENV_IS_IN_SPI_NOR
89#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3
90#define CONFIG_HOSTNAME kmcoge5un
91#define CONFIG_KM_DISABLE_PCIE
92#define CONFIG_KM_PIGGY4_88E6352
Holger Brunck6ef64862012-07-05 05:05:04 +000093
94/* KM_PORTL2 */
95#elif defined(CONFIG_KM_PORTL2)
96#define CONFIG_IDENT_STRING "\nKeymile Port-L2"
97#define CONFIG_HOSTNAME portl2
Heiko Schocherf3e93612012-10-25 11:07:00 +020098#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunck6ef64862012-07-05 05:05:04 +000099#define CONFIG_KM_PIGGY4_88E6061
100
Holger Brunck90639fe2013-01-15 22:51:22 +0000101/* KM_SUV31 */
102#elif defined(CONFIG_KM_SUV31)
Heiko Schocherea818db2013-01-29 08:53:15 +0100103#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunck90639fe2013-01-15 22:51:22 +0000104#define CONFIG_IDENT_STRING "\nKeymile SUV31"
105#define CONFIG_HOSTNAME kmsuv31
Holger Brunck2a4ebef2014-01-27 16:58:24 +0100106#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamada4ab3fc52014-03-11 11:05:17 +0900107#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Holger Brunck90639fe2013-01-15 22:51:22 +0000108#define CONFIG_KM_ENV_IS_IN_SPI_NOR
109#define CONFIG_KM_FPGA_CONFIG
Holger Brunck58c90c82014-08-15 10:51:48 +0200110#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
111#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
Holger Brunck8170aef2012-07-05 05:37:46 +0000112#else
113#error ("Board unsupported")
114#endif
115
Heiko Schocher67fa8c22010-02-22 16:43:02 +0530116/* include common defines/options for all arm based Keymile boards */
Valentin Longchamp264eaa02011-05-04 01:47:33 +0000117#include "km/km_arm.h"
Heiko Schocher67fa8c22010-02-22 16:43:02 +0530118
Holger Brunck8170aef2012-07-05 05:37:46 +0000119#if defined(CONFIG_KM_PIGGY4_88E6352)
120/*
121 * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
122 * an Marvell 88E6352 simple switch.
123 * In this case we have to change the default settings for the etherent mac.
124 * There is NO ethernet phy. The ARM and Switch are conencted directly over
125 * RGMII in MAC-MAC mode
126 * In this case 1GBit full duplex and autoneg off
127 */
128#define PORT_SERIAL_CONTROL_VALUE ( \
129 MVGBE_FORCE_LINK_PASS | \
130 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
131 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
132 MVGBE_ADV_NO_FLOW_CTRL | \
133 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
134 MVGBE_FORCE_BP_MODE_NO_JAM | \
135 (1 << 9) /* Reserved bit has to be 1 */ | \
136 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
137 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
138 MVGBE_DTE_ADV_0 | \
139 MVGBE_MIIPHY_MAC_MODE | \
140 MVGBE_AUTO_NEG_NO_CHANGE | \
141 MVGBE_MAX_RX_PACKET_1552BYTE | \
142 MVGBE_CLR_EXT_LOOPBACK | \
143 MVGBE_SET_FULL_DUPLEX_MODE | \
144 MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
145 MVGBE_SET_GMII_SPEED_TO_1000 |\
146 MVGBE_SET_MII_SPEED_TO_100)
147
148#endif
Heiko Schocher731b9682011-03-08 10:53:51 +0100149
Holger Brunckf9454392012-07-05 05:05:03 +0000150#ifdef CONFIG_KM_PIGGY4_88E6061
151/*
152 * Some keymile boards like mgcoge3un have their PIGGY4 connected via
153 * an Marvell 88E6061 simple switch.
154 * In this case we have to change the default settings for the
155 * ethernet phy connected to the kirkwood.
156 * In this case 100MB full duplex and autoneg off
157 */
158#define PORT_SERIAL_CONTROL_VALUE ( \
159 MVGBE_FORCE_LINK_PASS | \
160 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
161 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
162 MVGBE_ADV_NO_FLOW_CTRL | \
163 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
164 MVGBE_FORCE_BP_MODE_NO_JAM | \
165 (1 << 9) /* Reserved bit has to be 1 */ | \
166 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
167 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
168 MVGBE_DTE_ADV_0 | \
169 MVGBE_MIIPHY_MAC_MODE | \
170 MVGBE_AUTO_NEG_NO_CHANGE | \
171 MVGBE_MAX_RX_PACKET_1552BYTE | \
172 MVGBE_CLR_EXT_LOOPBACK | \
173 MVGBE_SET_FULL_DUPLEX_MODE | \
174 MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
175 MVGBE_SET_GMII_SPEED_TO_10_100 |\
176 MVGBE_SET_MII_SPEED_TO_100)
177#endif
178
Holger Brunckf9454392012-07-05 05:05:03 +0000179#ifdef CONFIG_KM_DISABLE_PCI
180#undef CONFIG_KIRKWOOD_PCIE_INIT
181#endif
Valentin Longchampb37f7722012-07-05 05:05:05 +0000182
Valentin Longchampb37f7722012-07-05 05:05:05 +0000183
Holger Brunck83b40c32011-06-16 18:11:15 +0530184#endif /* _CONFIG_KM_KIRKWOOD */