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wdenk3bac3512003-03-12 10:41:04 +00001/*
2 * (C) Copyright 2001
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <mpc824x.h>
26#include <asm/processor.h>
27#include <pci.h>
28
wdenk8bde7f72003-06-27 21:31:46 +000029int sysControlDisplay(int digit, uchar ascii_code);
wdenk3bac3512003-03-12 10:41:04 +000030extern void Plx9030Init(void);
31
32 /* We have to clear the initial data area here. Couldn't have done it
33 * earlier because DRAM had not been initialized.
34 */
35int board_pre_init(void)
36{
37
38 /* enable DUAL UART Mode on CPC45 */
39 *(uchar*)DUART_DCR |= 0x1; /* set DCM bit */
40
41 return 0;
42}
43
44int checkboard(void)
45{
46/*
47 char revision = BOARD_REV;
48*/
49 ulong busfreq = get_bus_freq(0);
50 char buf[32];
51
52 printf("CPC45 ");
53/*
54 printf("Revision %d ", revision);
55*/
56 printf("Local Bus at %s MHz\n", strmhz(buf, busfreq));
57
58 return 0;
59}
60
61long int initdram(int board_type)
62{
wdenkc83bf6a2004-01-06 22:38:14 +000063 long size;
64 long new_bank0_end;
65 long mear1;
66 long emear1;
wdenk3bac3512003-03-12 10:41:04 +000067
wdenkc83bf6a2004-01-06 22:38:14 +000068 size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
wdenk3bac3512003-03-12 10:41:04 +000069
wdenkc83bf6a2004-01-06 22:38:14 +000070 new_bank0_end = size - 1;
71 mear1 = mpc824x_mpc107_getreg(MEAR1);
72 emear1 = mpc824x_mpc107_getreg(EMEAR1);
73 mear1 = (mear1 & 0xFFFFFF00) |
74 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
75 emear1 = (emear1 & 0xFFFFFF00) |
76 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
77 mpc824x_mpc107_setreg(MEAR1, mear1);
78 mpc824x_mpc107_setreg(EMEAR1, emear1);
wdenk3bac3512003-03-12 10:41:04 +000079
wdenkc83bf6a2004-01-06 22:38:14 +000080 return (size);
wdenk3bac3512003-03-12 10:41:04 +000081}
82
83/*
84 * Initialize PCI Devices, report devices found.
85 */
86#ifndef CONFIG_PCI_PNP
87
88static struct pci_config_table pci_sandpoint_config_table[] = {
89 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
90 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
91 PCI_ENET0_MEMADDR,
92 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
93 { }
94};
95#endif
96
97
98struct pci_controller hose = {
99#ifndef CONFIG_PCI_PNP
100 config_table: pci_sandpoint_config_table,
101#endif
102};
103
104void pci_init_board(void)
105{
106 pci_mpc824x_init(&hose);
107
108 /* init PCI_to_LOCAL Bus BRIDGE */
109 Plx9030Init();
110
111 sysControlDisplay(0,' ');
112 sysControlDisplay(1,'C');
113 sysControlDisplay(2,'P');
114 sysControlDisplay(3,'C');
115 sysControlDisplay(4,' ');
116 sysControlDisplay(5,'4');
117 sysControlDisplay(6,'5');
118 sysControlDisplay(7,' ');
119
120}
121
122/**************************************************************************
123*
124* sysControlDisplay - controls one of the Alphanum. Display digits.
125*
126* This routine will write an ASCII character to the display digit requested.
127*
128* SEE ALSO:
129*
130* RETURNS: NA
131*/
132
133int sysControlDisplay
134 (
135 int digit, /* number of digit 0..7 */
136 uchar ascii_code /* ASCII code */
137 )
138{
139 if ((digit < 0) || (digit > 7))
140 return (-1);
141
142 *((volatile uchar*)(DISP_CHR_RAM + digit)) = ascii_code;
143
144 return (0);
145}