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Daniel Hellstromab68f922008-03-28 10:20:43 +01001/* Configuration header file for LEON2 GRSIM.
2 *
3 * (C) Copyright 2003-2005
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Francois Retiefc8379012015-11-21 13:25:41 +02006 * (C) Copyright 2007, 2015
7 * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
Daniel Hellstromab68f922008-03-28 10:20:43 +01008 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02009 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstromab68f922008-03-28 10:20:43 +010010 */
11
12#ifndef __CONFIG_H__
13#define __CONFIG_H__
14
15/*
16 * High Level Configuration Options
17 * (easy to change)
18 *
19 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
20 *
21 * TSIM command
22 * tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu
23 *
24 */
25
Daniel Hellstromab68f922008-03-28 10:20:43 +010026#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
27#define CONFIG_TSIM 1 /* ... running on TSIM */
28
29/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020030#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstromab68f922008-03-28 10:20:43 +010031
Daniel Hellstromab68f922008-03-28 10:20:43 +010032/*
33 * Serial console configuration
34 */
35#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020036#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstromab68f922008-03-28 10:20:43 +010037
38/* Partitions */
Daniel Hellstromab68f922008-03-28 10:20:43 +010039#define CONFIG_ISO_PARTITION
40
41/*
42 * Supported commands
43 */
Daniel Hellstromab68f922008-03-28 10:20:43 +010044#define CONFIG_CMD_DIAG
Siva Durga Prasad Paladugu64e809a2014-03-14 16:35:38 +053045#define CONFIG_CMD_FPGA_LOADMK
Daniel Hellstromab68f922008-03-28 10:20:43 +010046#define CONFIG_CMD_IRQ
Daniel Hellstromab68f922008-03-28 10:20:43 +010047#define CONFIG_CMD_REGINFO
Daniel Hellstromab68f922008-03-28 10:20:43 +010048
49/*
50 * Autobooting
51 */
Daniel Hellstromab68f922008-03-28 10:20:43 +010052
53#define CONFIG_PREBOOT "echo;" \
54 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
55 "echo"
56
57#undef CONFIG_BOOTARGS
Daniel Hellstromab68f922008-03-28 10:20:43 +010058
59#define CONFIG_EXTRA_ENV_SETTINGS \
60 "netdev=eth0\0" \
61 "nfsargs=setenv bootargs root=/dev/nfs rw " \
62 "nfsroot=${serverip}:${rootpath}\0" \
63 "ramargs=setenv bootargs root=/dev/ram rw\0" \
64 "addip=setenv bootargs ${bootargs} " \
65 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
66 ":${hostname}:${netdev}:off panic=1\0" \
67 "flash_nfs=run nfsargs addip;" \
68 "bootm ${kernel_addr}\0" \
69 "flash_self=run ramargs addip;" \
70 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
71 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
72 "rootpath=/export/roofs\0" \
73 "scratch=40000000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000074 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstromab68f922008-03-28 10:20:43 +010075 "bootargs=console=ttyS0,38400" \
76 ""
77#define CONFIG_NETMASK 255.255.255.0
78#define CONFIG_GATEWAYIP 192.168.0.1
79#define CONFIG_SERVERIP 192.168.0.81
80#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger8b3637c2011-10-13 13:03:47 +000081#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstromab68f922008-03-28 10:20:43 +010082#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +000083#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstromab68f922008-03-28 10:20:43 +010084
85#define CONFIG_BOOTCOMMAND "run flash_self"
86
87/* Memory MAP
88 *
89 * Flash:
90 * |--------------------------------|
91 * | 0x00000000 Text & Data & BSS | *
92 * | for Monitor | *
93 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
94 * | UNUSED / Growth | * 256kb
95 * |--------------------------------|
96 * | 0x00050000 Base custom area | *
97 * | kernel / FS | *
98 * | | * Rest of Flash
99 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
100 * | END-0x00008000 Environment | * 32kb
101 * |--------------------------------|
102 *
103 *
104 *
105 * Main Memory:
106 * |--------------------------------|
107 * | UNUSED / scratch area |
108 * | |
109 * | |
110 * | |
111 * | |
112 * |--------------------------------|
113 * | Monitor .Text / .DATA / .BSS | * 256kb
114 * | Relocated! | *
115 * |--------------------------------|
116 * | Monitor Malloc | * 128kb (contains relocated environment)
117 * |--------------------------------|
118 * | Monitor/kernel STACK | * 64kb
119 * |--------------------------------|
120 * | Page Table for MMU systems | * 2k
121 * |--------------------------------|
122 * | PROM Code accessed from Linux | * 6kb-128b
123 * |--------------------------------|
124 * | Global data (avail from kernel)| * 128b
125 * |--------------------------------|
126 *
127 */
128
129/*
130 * Flash configuration (8,16 or 32 MB)
131 * TEXT base always at 0xFFF00000
132 * ENV_ADDR always at 0xFFF40000
133 * FLASH_BASE at 0xFC000000 for 64 MB
134 * 0xFE000000 for 32 MB
135 * 0xFF000000 for 16 MB
136 * 0xFF800000 for 8 MB
137 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200138#define CONFIG_SYS_NO_FLASH 1
139#define CONFIG_SYS_FLASH_BASE 0x00000000
140#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200141#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100142
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200143#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100144
145#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
147#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100148
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
150#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
151#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
152#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100153
154#ifdef ENABLE_FLASH_SUPPORT
155/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100157
158#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
159
160/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200161#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200162#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163#define CONFIG_SYS_FLASH_CFI
Daniel Hellstromab68f922008-03-28 10:20:43 +0100164#endif
165
166/*
167 * Environment settings
168 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200169#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200170/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200171/*#define CONFIG_ENV_SIZE 0x8000*/
172#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100173#define CONFIG_ENV_OVERWRITE 1
174
175/*
176 * Memory map
177 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200178#define CONFIG_SYS_SDRAM_BASE 0x40000000
179#define CONFIG_SYS_SDRAM_SIZE 0x00800000
180#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100181
182/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183#undef CONFIG_SYS_SRAM_BASE
184#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstromab68f922008-03-28 10:20:43 +0100185
Daniel Hellstromab68f922008-03-28 10:20:43 +0100186/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
188#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
189#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstromab68f922008-03-28 10:20:43 +0100190
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200191#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100192
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200193#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200194#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100195
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
197#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100198
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200199#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200200#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
201# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstromab68f922008-03-28 10:20:43 +0100202#endif
203
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200204#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
205#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
206#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100207
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
209#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100210
211/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
213#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100214
215/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200216#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstromab68f922008-03-28 10:20:43 +0100217
218/*
219 * Ethernet configuration
220 */
221/*#define CONFIG_GRETH 1*/
Daniel Hellstromab68f922008-03-28 10:20:43 +0100222
Daniel Hellstromab68f922008-03-28 10:20:43 +0100223/*
224 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
225 */
226/* #define CONFIG_GRETH_10MBIT 1 */
227#define CONFIG_PHY_ADDR 0x00
228
229/*
230 * Miscellaneous configurable options
231 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100233#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200234#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100235#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200236#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100237#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200238#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
239#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
240#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100241
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200242#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
243#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100244
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200245#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100246
Daniel Hellstromab68f922008-03-28 10:20:43 +0100247/***** Gaisler GRLIB IP-Cores Config ********/
248
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200249#define CONFIG_SYS_GRLIB_SDRAM 0
250#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstromab68f922008-03-28 10:20:43 +0100251#if CONFIG_GRSIM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200252#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100253#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200254#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
Daniel Hellstromab68f922008-03-28 10:20:43 +0100255#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200256#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100257
258/*** LEON2 UART 1 ***/
Wolfgang Denk1aeed8d2008-04-13 09:59:26 -0700259
Daniel Hellstromab68f922008-03-28 10:20:43 +0100260/* UART1 Define to 1 or 0 */
261#define LEON2_UART1_LOOPBACK_ENABLE 0
262#define LEON2_UART1_FLOWCTRL_ENABLE 0
263#define LEON2_UART1_PARITY_ENABLE 0
264#define LEON2_UART1_ODDPAR_ENABLE 0
265
266/*** LEON2 UART 2 ***/
267
Daniel Hellstromab68f922008-03-28 10:20:43 +0100268/* UART2 Define to 1 or 0 */
269#define LEON2_UART2_LOOPBACK_ENABLE 0
270#define LEON2_UART2_FLOWCTRL_ENABLE 0
271#define LEON2_UART2_PARITY_ENABLE 0
272#define LEON2_UART2_ODDPAR_ENABLE 0
273
274#define LEON_CONSOLE_UART1 1
275#define LEON_CONSOLE_UART2 2
276
277/* Use UART2 as console */
278#define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1
279
280/* LEON2 I/O Port */
281/*#define LEON2_IO_PORT_DIR 0x0000aa00*/
282
283/* default kernel command line */
284#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
285
Daniel Hellstromab68f922008-03-28 10:20:43 +0100286#endif /* __CONFIG_H */