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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Stephen Warren3917c262016-03-18 21:41:38 -06002/*
3 * (C) Copyright 2016 Stephen Warren <swarren@wwwdotorg.org>
4 *
5 * Derived from pl01x code:
6 *
7 * (C) Copyright 2000
8 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
9 *
10 * (C) Copyright 2004
11 * ARM Ltd.
12 * Philippe Robin, <philippe.robin@arm.com>
Stephen Warren3917c262016-03-18 21:41:38 -060013 */
14
15/* Simple U-Boot driver for the BCM283x mini UART */
16
17#include <common.h>
18#include <dm.h>
19#include <errno.h>
20#include <watchdog.h>
Alexander Graf9dfeffe2018-01-25 12:05:48 +010021#include <asm/gpio.h>
Stephen Warren3917c262016-03-18 21:41:38 -060022#include <asm/io.h>
23#include <serial.h>
24#include <dm/platform_data/serial_bcm283x_mu.h>
Alexander Graf9dfeffe2018-01-25 12:05:48 +010025#include <dm/pinctrl.h>
Simon Glasscd93d622020-05-10 11:40:13 -060026#include <linux/bitops.h>
Stephen Warren3917c262016-03-18 21:41:38 -060027#include <linux/compiler.h>
Fabian Vogt9f755f52016-09-26 14:26:44 +020028
Stephen Warren3917c262016-03-18 21:41:38 -060029struct bcm283x_mu_regs {
30 u32 io;
31 u32 iir;
32 u32 ier;
33 u32 lcr;
34 u32 mcr;
35 u32 lsr;
36 u32 msr;
37 u32 scratch;
38 u32 cntl;
39 u32 stat;
40 u32 baud;
41};
42
43#define BCM283X_MU_LCR_DATA_SIZE_8 3
44
45#define BCM283X_MU_LSR_TX_IDLE BIT(6)
46/* This actually means not full, but is named not empty in the docs */
47#define BCM283X_MU_LSR_TX_EMPTY BIT(5)
48#define BCM283X_MU_LSR_RX_READY BIT(0)
49
50struct bcm283x_mu_priv {
51 struct bcm283x_mu_regs *regs;
52};
53
Alexander Graf293b9812018-03-07 22:08:24 +010054static int bcm283x_mu_serial_getc(struct udevice *dev);
55
Stephen Warren3917c262016-03-18 21:41:38 -060056static int bcm283x_mu_serial_setbrg(struct udevice *dev, int baudrate)
57{
Simon Glass8a8d24b2020-12-03 16:55:23 -070058 struct bcm283x_mu_serial_plat *plat = dev_get_plat(dev);
Stephen Warren3917c262016-03-18 21:41:38 -060059 struct bcm283x_mu_priv *priv = dev_get_priv(dev);
60 struct bcm283x_mu_regs *regs = priv->regs;
61 u32 divider;
62
Alexander Graffc8523a2018-01-25 12:05:44 +010063 if (plat->skip_init)
Alexander Graf293b9812018-03-07 22:08:24 +010064 goto out;
Stephen Warren3917c262016-03-18 21:41:38 -060065
66 divider = plat->clock / (baudrate * 8);
67
68 writel(BCM283X_MU_LCR_DATA_SIZE_8, &regs->lcr);
69 writel(divider - 1, &regs->baud);
70
Alexander Graf293b9812018-03-07 22:08:24 +010071out:
72 /* Flush the RX queue - all data in there is bogus */
73 while (bcm283x_mu_serial_getc(dev) != -EAGAIN) ;
74
Stephen Warren3917c262016-03-18 21:41:38 -060075 return 0;
76}
77
Stephen Warren3917c262016-03-18 21:41:38 -060078static int bcm283x_mu_serial_getc(struct udevice *dev)
79{
80 struct bcm283x_mu_priv *priv = dev_get_priv(dev);
81 struct bcm283x_mu_regs *regs = priv->regs;
82 u32 data;
83
84 /* Wait until there is data in the FIFO */
85 if (!(readl(&regs->lsr) & BCM283X_MU_LSR_RX_READY))
86 return -EAGAIN;
87
88 data = readl(&regs->io);
89
90 return (int)data;
91}
92
93static int bcm283x_mu_serial_putc(struct udevice *dev, const char data)
94{
95 struct bcm283x_mu_priv *priv = dev_get_priv(dev);
96 struct bcm283x_mu_regs *regs = priv->regs;
97
98 /* Wait until there is space in the FIFO */
99 if (!(readl(&regs->lsr) & BCM283X_MU_LSR_TX_EMPTY))
100 return -EAGAIN;
101
102 /* Send the character */
103 writel(data, &regs->io);
104
105 return 0;
106}
107
108static int bcm283x_mu_serial_pending(struct udevice *dev, bool input)
109{
110 struct bcm283x_mu_priv *priv = dev_get_priv(dev);
111 struct bcm283x_mu_regs *regs = priv->regs;
Fabian Vogtcb97ad42016-09-26 14:26:49 +0200112 unsigned int lsr;
113
Fabian Vogtcb97ad42016-09-26 14:26:49 +0200114 lsr = readl(&regs->lsr);
Stephen Warren3917c262016-03-18 21:41:38 -0600115
116 if (input) {
117 WATCHDOG_RESET();
Stephen Warrene3a46e32016-04-13 22:29:52 -0600118 return (lsr & BCM283X_MU_LSR_RX_READY) ? 1 : 0;
Stephen Warren3917c262016-03-18 21:41:38 -0600119 } else {
Stephen Warrene3a46e32016-04-13 22:29:52 -0600120 return (lsr & BCM283X_MU_LSR_TX_IDLE) ? 0 : 1;
Stephen Warren3917c262016-03-18 21:41:38 -0600121 }
122}
123
124static const struct dm_serial_ops bcm283x_mu_serial_ops = {
125 .putc = bcm283x_mu_serial_putc,
126 .pending = bcm283x_mu_serial_pending,
127 .getc = bcm283x_mu_serial_getc,
128 .setbrg = bcm283x_mu_serial_setbrg,
129};
130
Fabian Vogt9f755f52016-09-26 14:26:44 +0200131#if CONFIG_IS_ENABLED(OF_CONTROL)
132static const struct udevice_id bcm283x_mu_serial_id[] = {
133 {.compatible = "brcm,bcm2835-aux-uart"},
134 {}
135};
136
Alexander Graf9dfeffe2018-01-25 12:05:48 +0100137/*
138 * Check if this serial device is muxed
139 *
140 * The serial device will only work properly if it has been muxed to the serial
141 * pins by firmware. Check whether that happened here.
142 *
143 * @return true if serial device is muxed, false if not
144 */
145static bool bcm283x_is_serial_muxed(void)
146{
147 int serial_gpio = 15;
148 struct udevice *dev;
149
150 if (uclass_first_device(UCLASS_PINCTRL, &dev) || !dev)
151 return false;
152
153 if (pinctrl_get_gpio_mux(dev, 0, serial_gpio) != BCM2835_GPIO_ALT5)
154 return false;
155
156 return true;
157}
158
Simon Glass0ed0db92020-03-22 21:15:53 -0600159static int bcm283x_mu_serial_probe(struct udevice *dev)
Fabian Vogt9f755f52016-09-26 14:26:44 +0200160{
Simon Glass8a8d24b2020-12-03 16:55:23 -0700161 struct bcm283x_mu_serial_plat *plat = dev_get_plat(dev);
Simon Glass0ed0db92020-03-22 21:15:53 -0600162 struct bcm283x_mu_priv *priv = dev_get_priv(dev);
Fabian Vogt9f755f52016-09-26 14:26:44 +0200163 fdt_addr_t addr;
164
Alexander Graf9dfeffe2018-01-25 12:05:48 +0100165 /* Don't spawn the device if it's not muxed */
166 if (!bcm283x_is_serial_muxed())
167 return -ENODEV;
168
Simon Glass0ed0db92020-03-22 21:15:53 -0600169 /*
Simon Glassd1998a92020-12-03 16:55:21 -0700170 * Read the ofdata here rather than in an of_to_plat() method
Simon Glass0ed0db92020-03-22 21:15:53 -0600171 * since we need the soc simple-bus to be probed so that the 'ranges'
172 * property is used.
173 */
Masahiro Yamada25484932020-07-17 14:36:48 +0900174 addr = dev_read_addr(dev);
Fabian Vogt9f755f52016-09-26 14:26:44 +0200175 if (addr == FDT_ADDR_T_NONE)
176 return -EINVAL;
177
178 plat->base = addr;
Alexander Graf80d50012018-01-25 12:05:46 +0100179 plat->clock = dev_read_u32_default(dev, "clock", 1);
Alexander Grafbceab8d2018-01-25 12:05:47 +0100180
181 /*
182 * TODO: Reinitialization doesn't always work for now, just skip
183 * init always - we know we're already initialized
184 */
185 plat->skip_init = true;
Alexander Graf80d50012018-01-25 12:05:46 +0100186
Simon Glass0ed0db92020-03-22 21:15:53 -0600187 priv->regs = (struct bcm283x_mu_regs *)plat->base;
188
Fabian Vogt9f755f52016-09-26 14:26:44 +0200189 return 0;
190}
191#endif
192
Stephen Warren3917c262016-03-18 21:41:38 -0600193U_BOOT_DRIVER(serial_bcm283x_mu) = {
194 .name = "serial_bcm283x_mu",
195 .id = UCLASS_SERIAL,
Fabian Vogt9f755f52016-09-26 14:26:44 +0200196 .of_match = of_match_ptr(bcm283x_mu_serial_id),
Simon Glass8a8d24b2020-12-03 16:55:23 -0700197 .plat_auto = sizeof(struct bcm283x_mu_serial_plat),
Stephen Warren3917c262016-03-18 21:41:38 -0600198 .probe = bcm283x_mu_serial_probe,
199 .ops = &bcm283x_mu_serial_ops,
Matthias Brugger3f8b8e32019-11-08 14:49:48 +0100200#if !CONFIG_IS_ENABLED(OF_CONTROL) || CONFIG_IS_ENABLED(OF_BOARD)
Stephen Warren3917c262016-03-18 21:41:38 -0600201 .flags = DM_FLAG_PRE_RELOC,
Bin Meng46879192018-10-24 06:36:36 -0700202#endif
Simon Glass41575d82020-12-03 16:55:17 -0700203 .priv_auto = sizeof(struct bcm283x_mu_priv),
Stephen Warren3917c262016-03-18 21:41:38 -0600204};