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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <config.h>
25#include <common.h>
26#include <command.h>
27#include <asm/io.h>
28#include <linux/mtd/doc2000.h>
29#include <watchdog.h>
30#include <pci.h>
31
32#include "hardware.h"
33#include "pcippc2.h"
34#include "sconsole.h"
35#include "fpga_serial.h"
36
Wolfgang Denkd87080b2006-03-31 18:32:53 +020037DECLARE_GLOBAL_DATA_PTR;
38
wdenkc6097192002-11-03 00:24:07 +000039#if defined(CONFIG_WATCHDOG)
40
41static int pcippc2_wdt_init_done = 0;
42
43void pcippc2_wdt_init (void);
44
45#endif
46
47 /* Check board identity
48 */
49int checkboard (void)
50{
51#ifdef CONFIG_PCIPPC2
52 puts ("Board: Gespac PCIPPC-2\n");
53#else
54 puts ("Board: Gespac PCIPPC-6\n");
55#endif
56 return 0;
57}
58
59 /* RAM size is stored in CPC0_RGBAN1
60 */
61u32 pcippc2_sdram_size (void)
62{
63 return in32 (REG (CPC0, RGBAN1));
64}
65
66long initdram (int board_type)
67{
68 return cpc710_ram_init ();
69}
70
wdenk8bde7f72003-06-27 21:31:46 +000071int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
wdenkc6097192002-11-03 00:24:07 +000072{
73 out32 (REG (CPC0, SPOR), 0);
74 iobarrier_rw ();
75 while (1);
wdenk8bde7f72003-06-27 21:31:46 +000076 /* notreached */
77 return (-1);
wdenkc6097192002-11-03 00:24:07 +000078}
79
wdenkc837dcb2004-01-20 23:12:12 +000080int board_early_init_f (void)
wdenkc6097192002-11-03 00:24:07 +000081{
82 out32 (REG (CPC0, RSTR), 0xC0000000);
83 iobarrier_rw ();
84
85 out32 (REG (CPC0, RSTR), 0xF0000000);
86 iobarrier_rw ();
87
88 out32 (REG (CPC0, UCTL), 0x00F80000);
89
90 out32 (REG (CPC0, SIOC0), 0x30000000);
91
92 out32 (REG (CPC0, ABCNTL), 0x00000000);
93
94 out32 (REG (CPC0, SESR), 0x00000000);
95 out32 (REG (CPC0, SEAR), 0x00000000);
96
97 /* Detect IBM Avignon CPC710 Revision */
98 if ((in32 (REG (CPC0, UCTL)) & 0x000000F0) == CPC710_TYPE_100P)
99 out32 (REG (CPC0, PGCHP), 0xA0000040);
100 else
101 out32 (REG (CPC0, PGCHP), 0x80800040);
102
103
104 out32 (REG (CPC0, ATAS), 0x709C2508);
105
106 iobarrier_rw ();
107
108 return 0;
109}
110
111void after_reloc (ulong dest_addr)
112{
wdenkc6097192002-11-03 00:24:07 +0000113 /* Jump to the main U-Boot board init code
114 */
wdenk27b207f2003-07-24 23:38:38 +0000115 board_init_r ((gd_t *)gd, dest_addr);
wdenkc6097192002-11-03 00:24:07 +0000116}
117
118int misc_init_r (void)
119{
120 pcippc2_fpga_init ();
121
wdenke95b61c2002-11-04 16:02:40 +0000122 pcippc2_cpci3264_init ();
123
wdenkc6097192002-11-03 00:24:07 +0000124#if defined(CONFIG_WATCHDOG)
125 pcippc2_wdt_init ();
126#endif
127
128 fpga_serial_init (sconsole_get_baudrate ());
129
130 sconsole_putc = fpga_serial_putc;
131 sconsole_puts = fpga_serial_puts;
132 sconsole_getc = fpga_serial_getc;
133 sconsole_tstc = fpga_serial_tstc;
134 sconsole_setbrg = fpga_serial_setbrg;
135
136 sconsole_flush ();
137 return (0);
138}
139
stroesead10dd92003-02-14 11:21:23 +0000140void pci_init_board (void)
wdenkc6097192002-11-03 00:24:07 +0000141{
142 cpc710_pci_init ();
143
144 /* FPGA requires no retry timeouts to be enabled
145 */
146 cpc710_pci_enable_timeout ();
147}
148
149void doc_init (void)
150{
151 doc_probe (pcippc2_fpga1_phys + HW_FPGA1_DOC);
152}
153
wdenke95b61c2002-11-04 16:02:40 +0000154void pcippc2_cpci3264_init (void)
155{
156 pci_dev_t bdf = pci_find_device(FPGA_VENDOR_ID, FPGA_DEVICE_ID, 0);
157
158 if (bdf == -1)
159 {
160 puts("Unable to find FPGA !\n");
161 hang();
162 }
163
164 if((in32(pcippc2_fpga0_phys + HW_FPGA0_BOARD) & 0x01000000) == 0x01000000)
165 /* 32-bits Compact PCI bus - LSB bit */
166 {
167 iobarrier_rw();
168 out32(BRIDGE(CPCI, PCIDG), 0x40000000); /* 32-bits bridge, Pipeline */
169 iobarrier_rw();
170 }
171}
172
wdenkc6097192002-11-03 00:24:07 +0000173#if defined(CONFIG_WATCHDOG)
174
175void pcippc2_wdt_init (void)
176{
177 out16r (FPGA (WDT, PROG), 0xffff);
178 out8 (FPGA (WDT, CTRL), 0x1);
179
180 pcippc2_wdt_init_done = 1;
181}
182
183void pcippc2_wdt_done (void)
184{
185 out8 (FPGA (WDT, CTRL), 0x0);
186
187 pcippc2_wdt_init_done = 0;
188}
189
190void pcippc2_wdt_reset (void)
191{
192 if (pcippc2_wdt_init_done == 1)
193 out8 (FPGA (WDT, REFRESH), 0x56);
194}
195
196void watchdog_reset (void)
197{
198 int re_enable = disable_interrupts ();
199
200 pcippc2_wdt_reset ();
201 if (re_enable)
202 enable_interrupts ();
203}
204
205#if (CONFIG_COMMANDS & CFG_CMD_BSP)
wdenk8bde7f72003-06-27 21:31:46 +0000206int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
wdenkc6097192002-11-03 00:24:07 +0000207{
208 switch (argc) {
209 case 1:
210 printf ("Watchdog timer status is %s\n",
211 pcippc2_wdt_init_done == 1 ? "on" : "off");
212
213 return 0;
214 case 2:
215 if (!strcmp(argv[1],"on")) {
216 pcippc2_wdt_init();
217 printf("Watchdog timer now is on\n");
218
219 return 0;
220
221 } else if (!strcmp(argv[1],"off")) {
222 pcippc2_wdt_done();
223 printf("Watchdog timer now is off\n");
224
225 return 0;
226
227 } else
228 break;
229 default:
230 break;
231 }
232 printf ("Usage:\n%s\n", cmdtp->usage);
233 return 1;
234}
235
wdenk0d498392003-07-01 21:06:45 +0000236U_BOOT_CMD(
237 wd, 2, 1, do_wd,
wdenk8bde7f72003-06-27 21:31:46 +0000238 "wd - check and set watchdog\n",
239 "on - switch watchDog on\n"
240 "wd off - switch watchdog off\n"
241 "wd - print current status\n"
242);
243
wdenkc6097192002-11-03 00:24:07 +0000244#endif /* CFG_CMD_BSP */
245#endif /* CONFIG_WATCHDOG */