blob: 84dc7656d1b13598e2a4dc01affbf19b833734df [file] [log] [blame]
Patrice Chotard10563032018-12-06 11:59:42 +01001// SPDX-License-Identifier: GPL-2.0+
2
3#include <dt-bindings/memory/stm32-sdram.h>
4
Patrice Chotarda1e384b2017-09-13 18:00:11 +02005/{
6 clocks {
7 u-boot,dm-pre-reloc;
8 };
9
Patrice Chotard10563032018-12-06 11:59:42 +010010 aliases {
11 gpio0 = &gpioa;
12 gpio1 = &gpiob;
13 gpio2 = &gpioc;
14 gpio3 = &gpiod;
15 gpio4 = &gpioe;
16 gpio5 = &gpiof;
17 gpio6 = &gpiog;
18 gpio7 = &gpioh;
19 gpio8 = &gpioi;
20 gpio9 = &gpioj;
21 gpio10 = &gpiok;
22 mmc0 = &sdmmc1;
dillon minffca1962021-04-09 15:28:40 +080023 pinctrl0 = &pinctrl;
Patrice Chotard10563032018-12-06 11:59:42 +010024 };
25
Patrice Chotarda1e384b2017-09-13 18:00:11 +020026 soc {
27 u-boot,dm-pre-reloc;
28 pin-controller {
29 u-boot,dm-pre-reloc;
30 };
Patrice Chotard10563032018-12-06 11:59:42 +010031
32 fmc: fmc@52004000 {
33 compatible = "st,stm32h7-fmc";
34 reg = <0x52004000 0x1000>;
35 clocks = <&rcc FMC_CK>;
36
37 pinctrl-0 = <&fmc_pins>;
38 pinctrl-names = "default";
39 status = "okay";
Patrice Chotard10563032018-12-06 11:59:42 +010040 };
Patrice Chotarda1e384b2017-09-13 18:00:11 +020041 };
42};
43
44&clk_hse {
45 u-boot,dm-pre-reloc;
46};
47
Patrice Chotarda1e384b2017-09-13 18:00:11 +020048&clk_i2s {
49 u-boot,dm-pre-reloc;
50};
51
Patrice Chotard10563032018-12-06 11:59:42 +010052&clk_lse {
Patrice Chotarda1e384b2017-09-13 18:00:11 +020053 u-boot,dm-pre-reloc;
54};
55
Patrice Chotarda1e384b2017-09-13 18:00:11 +020056
57&fmc {
58 u-boot,dm-pre-reloc;
59};
60
Patrice Chotarda1e384b2017-09-13 18:00:11 +020061&gpioa {
62 u-boot,dm-pre-reloc;
Patrice Chotard13ba6d02018-12-06 11:53:39 +010063 compatible = "st,stm32-gpio";
Patrice Chotarda1e384b2017-09-13 18:00:11 +020064};
65
66&gpiob {
67 u-boot,dm-pre-reloc;
Patrice Chotard13ba6d02018-12-06 11:53:39 +010068 compatible = "st,stm32-gpio";
Patrice Chotarda1e384b2017-09-13 18:00:11 +020069};
70
71&gpioc {
72 u-boot,dm-pre-reloc;
Patrice Chotard13ba6d02018-12-06 11:53:39 +010073 compatible = "st,stm32-gpio";
Patrice Chotarda1e384b2017-09-13 18:00:11 +020074};
75
76&gpiod {
77 u-boot,dm-pre-reloc;
Patrice Chotard13ba6d02018-12-06 11:53:39 +010078 compatible = "st,stm32-gpio";
Patrice Chotarda1e384b2017-09-13 18:00:11 +020079};
80
81&gpioe {
82 u-boot,dm-pre-reloc;
Patrice Chotard13ba6d02018-12-06 11:53:39 +010083 compatible = "st,stm32-gpio";
Patrice Chotarda1e384b2017-09-13 18:00:11 +020084};
85
86&gpiof {
87 u-boot,dm-pre-reloc;
Patrice Chotard13ba6d02018-12-06 11:53:39 +010088 compatible = "st,stm32-gpio";
Patrice Chotarda1e384b2017-09-13 18:00:11 +020089};
90
91&gpiog {
92 u-boot,dm-pre-reloc;
Patrice Chotard13ba6d02018-12-06 11:53:39 +010093 compatible = "st,stm32-gpio";
Patrice Chotarda1e384b2017-09-13 18:00:11 +020094};
95
96&gpioh {
97 u-boot,dm-pre-reloc;
Patrice Chotard13ba6d02018-12-06 11:53:39 +010098 compatible = "st,stm32-gpio";
Patrice Chotarda1e384b2017-09-13 18:00:11 +020099};
100
101&gpioi {
102 u-boot,dm-pre-reloc;
Patrice Chotard13ba6d02018-12-06 11:53:39 +0100103 compatible = "st,stm32-gpio";
Patrice Chotarda1e384b2017-09-13 18:00:11 +0200104};
105
106&gpioj {
107 u-boot,dm-pre-reloc;
Patrice Chotard13ba6d02018-12-06 11:53:39 +0100108 compatible = "st,stm32-gpio";
Patrice Chotarda1e384b2017-09-13 18:00:11 +0200109};
110
111&gpiok {
112 u-boot,dm-pre-reloc;
Patrice Chotard13ba6d02018-12-06 11:53:39 +0100113 compatible = "st,stm32-gpio";
Patrice Chotarda1e384b2017-09-13 18:00:11 +0200114};
Patrice Chotard10563032018-12-06 11:59:42 +0100115
Patrice Chotard10563032018-12-06 11:59:42 +0100116&pwrcfg {
117 u-boot,dm-pre-reloc;
118};
119
120&rcc {
121 u-boot,dm-pre-reloc;
122};
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100123
124&sdmmc1 {
125 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
126};
Patrice Chotard18336292020-11-06 08:11:59 +0100127
128&timer5 {
129 u-boot,dm-pre-reloc;
130};
dillon minffca1962021-04-09 15:28:40 +0800131
132&pinctrl {
133 u-boot,dm-pre-reloc;
134};