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Tom Warrenf01b6312012-12-11 13:34:18 +00001/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Warrenf01b6312012-12-11 13:34:18 +00006 */
7
Tom Warrenbfcf46d2013-02-26 12:18:48 +00008#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
Alexey Brodkin1ace4022014-02-26 17:47:58 +040010#include <linux/sizes.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000011#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
16#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
Tom Warrenf01b6312012-12-11 13:34:18 +000017#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
18
Tom Warrenf01b6312012-12-11 13:34:18 +000019#include <asm/arch/tegra.h> /* get chip and board defs */
20
Thierry Redingf41f0a12015-07-28 11:35:54 +020021/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
22#ifndef CONFIG_ARM64
Rob Herring31df9892013-10-04 10:22:47 -050023#define CONFIG_SYS_TIMER_RATE 1000000
24#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
Thierry Redingf41f0a12015-07-28 11:35:54 +020025#endif
Rob Herring31df9892013-10-04 10:22:47 -050026
Tom Warrenf01b6312012-12-11 13:34:18 +000027#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Tom Warrenf01b6312012-12-11 13:34:18 +000028
29/* Environment */
30#define CONFIG_ENV_VARS_UBOOT_CONFIG
31#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
32
33/*
Tom Warrenbfcf46d2013-02-26 12:18:48 +000034 * NS16550 Configuration
Tom Warrenf01b6312012-12-11 13:34:18 +000035 */
Thomas Chou18746262015-11-19 21:48:11 +080036#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Tom Warrenf01b6312012-12-11 13:34:18 +000037
38/*
Stephen Warrenf1756032014-04-18 10:56:11 -060039 * Common HW configuration.
40 * If this varies between SoCs later, move to tegraNN-common.h
41 * Note: This is number of devices, not max device ID.
42 */
43#define CONFIG_SYS_MMC_MAX_DEVICE 4
44
45/*
Tom Warrenf01b6312012-12-11 13:34:18 +000046 * select serial console configuration
47 */
48#define CONFIG_CONS_INDEX 1
49
50/* allow to overwrite serial and ethaddr */
51#define CONFIG_ENV_OVERWRITE
Tom Warrenf01b6312012-12-11 13:34:18 +000052
Tom Warrenf01b6312012-12-11 13:34:18 +000053/* turn on command-line edit/hist/auto */
Alexey Brodkina1b343d2017-04-18 22:09:10 +030054#define CONFIG_CMDLINE_EDITING
Tom Warrenf01b6312012-12-11 13:34:18 +000055
Tom Warrenf01b6312012-12-11 13:34:18 +000056/*
Tom Warrenf01b6312012-12-11 13:34:18 +000057 * Increasing the size of the IO buffer as default nfsargs size is more
58 * than 256 and so it is not possible to edit it
59 */
Bryan Wu64a4fe72016-09-01 23:49:57 +000060#define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */
Tom Warrenf01b6312012-12-11 13:34:18 +000061/* Print Buffer Size */
62#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
63 sizeof(CONFIG_SYS_PROMPT) + 16)
Bryan Wu64a4fe72016-09-01 23:49:57 +000064#define CONFIG_SYS_MAXARGS 64 /* max number of command args */
65
Tom Warrenf01b6312012-12-11 13:34:18 +000066/* Boot Argument Buffer Size */
67#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
68
69#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
70#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
71
Tom Warrenf01b6312012-12-11 13:34:18 +000072/*-----------------------------------------------------------------------
73 * Physical Memory Map
74 */
Stephen Warrenbbc1b992015-08-07 16:12:45 -060075#define CONFIG_NR_DRAM_BANKS 2
Tom Warrenf01b6312012-12-11 13:34:18 +000076#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
77#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
78
79#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
80#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
81
82#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
83
84#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
85#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
86#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
87 CONFIG_SYS_INIT_RAM_SIZE - \
88 GENERATED_GBL_DATA_SIZE)
89
Tom Warrenf01b6312012-12-11 13:34:18 +000090#define CONFIG_CMD_ENTERRCM
Tom Warrenf01b6312012-12-11 13:34:18 +000091
92/* Defines for SPL */
Tom Warrenf01b6312012-12-11 13:34:18 +000093#define CONFIG_SPL_FRAMEWORK
Tom Warrenf01b6312012-12-11 13:34:18 +000094#define CONFIG_SPL_BOARD_INIT
95#define CONFIG_SPL_NAND_SIMPLE
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +000096#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
Tom Warrenf01b6312012-12-11 13:34:18 +000097 CONFIG_SPL_TEXT_BASE)
98#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
99
Stephen Warrena885f852013-02-28 15:03:45 +0000100/* Misc utility code */
101#define CONFIG_BOUNCE_BUFFER
Tom Warren3efff992013-03-26 10:39:33 -0700102#define CONFIG_CRC32_VERIFY
Simon Glassdd7f65f2013-03-05 14:39:56 +0000103
Stephen Warren68cf64d2014-02-05 09:24:57 -0700104#ifndef CONFIG_SPL_BUILD
105#include <config_distro_defaults.h>
Stephen Warren68295a42015-09-04 22:03:50 -0600106#define CONFIG_FAT_WRITE
Stephen Warren68cf64d2014-02-05 09:24:57 -0700107#endif
108
Tom Warrenf01b6312012-12-11 13:34:18 +0000109#endif /* _TEGRA_COMMON_H_ */