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wdenk1eaeb582004-06-08 00:22:43 +00001/*
2 * (C) Copyright 2003
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29/*
wdenk1eaeb582004-06-08 00:22:43 +000030 * High Level Configuration Options
31 * (easy to change)
32 */
33#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
34#define CONFIG_OMAP 1 /* in a TI OMAP core */
35#define CONFIG_OMAP1610 1 /* 5912 is same as 1610 */
36#define CONFIG_OSK_OMAP5912 1 /* a OSK Board */
37
38/* input clock of PLL */
39/* the OMAP5912 OSK has 12MHz input clock */
40#define CONFIG_SYS_CLK_FREQ 12000000
41
42#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
43
44#define CONFIG_MISC_INIT_R
45
46#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
47#define CONFIG_SETUP_MEMORY_TAGS 1
48
49/*
50 * Size of malloc() pool
51 */
52#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
53
54/*
55 * Hardware drivers
56 */
57/*
58*/
59#define CONFIG_DRIVER_LAN91C96
60#define CONFIG_LAN91C96_BASE 0x04800300
61#define CONFIG_LAN91C96_EXT_PHY
62
63/*
64 * NS16550 Configuration
65 */
66#define CFG_NS16550
67#define CFG_NS16550_SERIAL
68#define CFG_NS16550_REG_SIZE (-4)
69#define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
70#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
71 on helen */
72
73/*
74 * select serial console configuration
75 */
76#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP5912 OSK */
77
78/* allow to overwrite serial and ethaddr */
79#define CONFIG_ENV_OVERWRITE
80#define CONFIG_CONS_INDEX 1
81#define CONFIG_BAUDRATE 115200
82#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
83
84#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
85#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
86
87/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
88#include <cmd_confdefs.h>
89#include <configs/omap1510.h>
90
91#define CONFIG_BOOTDELAY 3
92#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
93 root=/dev/nfs rw nfsroot=157.87.82.48:\
94 /home/mwd/myfs/target ip=dhcp"
95#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
96#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
97#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
98#define CONFIG_BOOTFILE "uImage" /* file to load */
99
100#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
101#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
102#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
103#endif
104
105/*
106 * Miscellaneous configurable options
107 */
108#define CFG_LONGHELP /* undef to save memory */
109#define CFG_PROMPT "OMAP5912 OSK # " /* Monitor Command Prompt */
110#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
111/* Print Buffer Size */
112#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
113#define CFG_MAXARGS 16 /* max number of command args */
114#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
115
116#define CFG_MEMTEST_START 0x10000000 /* memtest works on */
117#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
118
119#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
120
121#define CFG_LOAD_ADDR 0x10000000 /* default load address */
122
123/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
124 * DPLL1. This time is further subdivided by a local divisor.
125 */
126#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
127#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
128#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
129
130/*-----------------------------------------------------------------------
131 * Stack sizes
132 *
133 * The stack sizes are set up in start.S using the settings below
134 */
135#define CONFIG_STACKSIZE (128*1024) /* regular stack */
136#ifdef CONFIG_USE_IRQ
137#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
138#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
139#endif
140
141/*-----------------------------------------------------------------------
142 * Physical Memory Map
143 */
144#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
145#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
146#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
147
148#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
149
150#define CFG_FLASH_BASE PHYS_FLASH_1
151
152/*-----------------------------------------------------------------------
153 * FLASH and environment organization
154 */
155#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
156#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
157#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
158/* addr of environment */
159#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000)
160
161/* timeout values are in ticks */
162#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
163#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
164
165#define CFG_ENV_IS_IN_FLASH 1
166#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
167#define CFG_ENV_OFFSET 0x20000 /* environment starts here */
168
169#endif /* __CONFIG_H */