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Thomas Chouc8a7ba92015-10-09 13:46:34 +08001menu "Timer Support"
2
3config TIMER
Bin Meng435ae762015-11-13 00:11:14 -08004 bool "Enable driver model for timer drivers"
Thomas Chouc8a7ba92015-10-09 13:46:34 +08005 depends on DM
6 help
Bin Meng435ae762015-11-13 00:11:14 -08007 Enable driver model for timer access. It uses the same API as
8 lib/time.c, but now implemented by the uclass. The first timer
Thomas Chouc8a7ba92015-10-09 13:46:34 +08009 will be used. The timer is usually a 32 bits free-running up
10 counter. There may be no real tick, and no timer interrupt.
11
Philipp Tomsiche9e5d9d2017-07-28 17:38:42 +020012config SPL_TIMER
13 bool "Enable driver model for timer drivers in SPL"
14 depends on TIMER && SPL
15 help
16 Enable support for timer drivers in SPL. These can be used to get
17 a timer value when in SPL, or perhaps for implementing a delay
18 function. This enables the drivers in drivers/timer as part of an
19 SPL build.
20
21config TPL_TIMER
22 bool "Enable driver model for timer drivers in TPL"
23 depends on TIMER && TPL
24 help
25 Enable support for timer drivers in TPL. These can be used to get
26 a timer value when in TPL, or perhaps for implementing a delay
27 function. This enables the drivers in drivers/timer as part of an
28 TPL build.
29
Simon Glass747093d2022-04-30 00:56:53 -060030config VPL_TIMER
31 bool "Enable driver model for timer drivers in VPL"
32 depends on TIMER && VPL
33 default y if TPL_TIMER
34 help
35 Enable support for timer drivers in VPL. These can be used to get
36 a timer value when in VPL, or perhaps for implementing a delay
37 function. This enables the drivers in drivers/timer as part of an
38 TPL build.
39
Simon Glassc95fec32016-02-24 09:14:49 -070040config TIMER_EARLY
41 bool "Allow timer to be used early in U-Boot"
42 depends on TIMER
Simon Glass97d20f62018-09-02 17:02:24 -060043 # initr_bootstage() requires a timer and is called before initr_dm()
44 # so only the early timer is available
45 default y if X86 && BOOTSTAGE
Simon Glassc95fec32016-02-24 09:14:49 -070046 help
47 In some cases the timer must be accessible before driver model is
48 active. Examples include when using CONFIG_TRACE to trace U-Boot's
49 execution before driver model is set up. Enable this option to
50 use an early timer. These functions must be supported by your timer
51 driver: timer_early_get_count() and timer_early_get_rate().
52
Thomas Choua54915d2015-10-22 22:28:53 +080053config ALTERA_TIMER
Bin Meng435ae762015-11-13 00:11:14 -080054 bool "Altera timer support"
Thomas Choua54915d2015-10-22 22:28:53 +080055 depends on TIMER
56 help
Bin Meng435ae762015-11-13 00:11:14 -080057 Select this to enable a timer for Altera devices. Please find
Thomas Choua54915d2015-10-22 22:28:53 +080058 details on the "Embedded Peripherals IP User Guide" of Altera.
59
Sean Anderson7dbebeb2020-10-25 21:46:57 -040060config ANDES_PLMT_TIMER
Sean Anderson79b135f2020-10-25 21:46:56 -040061 bool
62 depends on RISCV_MMODE || SPL_RISCV_MMODE
63 help
64 The Andes PLMT block holds memory-mapped mtime register
65 associated with timer tick.
66
Bin Meng73fe4112018-10-10 22:07:02 -070067config ARC_TIMER
68 bool "ARC timer support"
69 depends on TIMER && ARC && CLK
70 help
71 Select this to enable built-in ARC timers.
72 ARC cores may have up to 2 built-in timers: timer0 and timer1,
73 usually at least one of them exists. Either of them is supported
74 in U-Boot.
75
76config AST_TIMER
77 bool "Aspeed ast2400/ast2500 timer support"
78 depends on TIMER
79 default y if ARCH_ASPEED
80 help
81 Select this to enable timer for Aspeed ast2400/ast2500 devices.
82 This is a simple sys timer driver, it is compatible with lib/time.c,
83 but does not support any interrupts. Even though SoC has 8 hardware
84 counters, they are all treated as a single device by this driver.
85 This is mostly because they all share several registers which
86 makes it difficult to completely separate them.
87
88config ATCPIT100_TIMER
89 bool "ATCPIT100 timer support"
90 depends on TIMER
91 help
92 Select this to enable a ATCPIT100 timer which will be embedded
93 in AE3XX, AE250 boards.
94
Wenyou.Yang@microchip.com47edaea2017-08-15 17:40:26 +080095config ATMEL_PIT_TIMER
96 bool "Atmel periodic interval timer support"
97 depends on TIMER
98 help
99 Select this to enable a periodic interval timer for Atmel devices,
100 it is designed to offer maximum accuracy and efficient management,
101 even for systems with long response time.
102
Eugen Hristev632422d2022-04-04 11:35:51 +0300103config SPL_ATMEL_PIT_TIMER
104 bool "Atmel periodic interval timer support in SPL"
105 depends on SPL_TIMER
106 help
107 Select this to enable a periodic interval timer for Atmel devices,
108 it is designed to offer maximum accuracy and efficient management,
109 even for systems with long response time.
110 Select this to be available in SPL.
111
Clément Léger70fb1ae2022-03-31 10:55:06 +0200112config ATMEL_TCB_TIMER
113 bool "Atmel timer counter support"
114 depends on TIMER
115 depends on ARCH_AT91
116 help
117 Select this to enable the use of the timer counter as a monotonic
118 counter.
119
Eugen Hristeve135d2c2022-04-04 11:35:50 +0300120config SPL_ATMEL_TCB_TIMER
121 bool "Atmel timer counter support in SPL"
122 depends on SPL_TIMER
123 depends on ARCH_AT91
124 help
125 Select this to enable the use of the timer counter as a monotonic
126 counter in SPL.
127
Michal Simek72c37d12018-04-17 13:40:46 +0200128config CADENCE_TTC_TIMER
129 bool "Cadence TTC (Triple Timer Counter)"
130 depends on TIMER
131 help
132 Enables support for the cadence ttc driver. This driver is present
133 on Xilinx Zynq and ZynqMP SoCs.
134
Marek Vasut66011a02018-08-18 15:58:32 +0200135config DESIGNWARE_APB_TIMER
136 bool "Designware APB Timer"
137 depends on TIMER
138 help
139 Enables support for the Designware APB Timer driver. This timer is
140 present on Altera SoCFPGA SoCs.
141
Bin Meng73fe4112018-10-10 22:07:02 -0700142config MPC83XX_TIMER
143 bool "MPC83xx timer support"
144 depends on TIMER
Thomas Chou9961a0b2015-10-30 15:35:52 +0800145 help
Bin Meng73fe4112018-10-10 22:07:02 -0700146 Select this to enable support for the timer found on
147 devices based on the MPC83xx family of SoCs.
Bin Meng7030f272015-11-13 00:11:24 -0800148
Marek Vasut4d0732b2019-05-04 17:30:58 +0200149config RENESAS_OSTM_TIMER
150 bool "Renesas RZ/A1 R7S72100 OSTM Timer"
151 depends on TIMER
152 help
153 Enables support for the Renesas OSTM Timer driver.
154 This timer is present on Renesas RZ/A1 R7S72100 SoCs.
155
Bin Meng5824bc62021-07-28 12:00:22 +0800156config X86_TSC_TIMER_FREQ
157 int "x86 TSC timer frequency in Hz"
Bin Meng6ce38362018-10-13 20:52:10 -0700158 depends on X86_TSC_TIMER
Bin Meng5824bc62021-07-28 12:00:22 +0800159 default 1000000000
Bin Meng6ce38362018-10-13 20:52:10 -0700160 help
Bin Meng5824bc62021-07-28 12:00:22 +0800161 Sets the estimated CPU frequency in Hz when TSC is used as the
Bin Meng6ce38362018-10-13 20:52:10 -0700162 early timer and the frequency can neither be calibrated via some
163 hardware ways, nor got from device tree at the time when device
164 tree is not available yet.
165
Stephan Gerhold057b6132020-01-04 18:45:15 +0100166config NOMADIK_MTU_TIMER
167 bool "Nomadik MTU Timer"
168 depends on TIMER
169 help
170 Enables support for the Nomadik Multi Timer Unit (MTU),
171 used in ST-Ericsson Ux500 SoCs.
172 The MTU provides 4 decrementing free-running timers.
173 At the moment, only the first timer is used by the driver.
174
Jim Liub789e4f2022-04-19 13:32:22 +0800175config NPCM_TIMER
176 bool "Nuvoton NPCM timer support"
177 depends on TIMER
178 help
179 Select this to enable a timer on Nuvoton NPCM SoCs.
180 NPCM timer module has 5 down-counting timers, only the first timer
181 is used to implement timer ops. No support for early timer and
182 boot timer.
183
Mugunthan V Ndadf3132015-12-24 16:08:07 +0530184config OMAP_TIMER
185 bool "Omap timer support"
186 depends on TIMER
187 help
188 Select this to enable an timer for Omap devices.
189
Bin Meng60262cd02018-12-12 06:12:27 -0800190config RISCV_TIMER
191 bool "RISC-V timer support"
192 depends on TIMER && RISCV
193 help
Sean Andersonc33efaf2020-09-28 10:52:21 -0400194 Select this to enable support for a generic RISC-V S-Mode timer
195 driver.
Bin Meng60262cd02018-12-12 06:12:27 -0800196
Bin Meng73fe4112018-10-10 22:07:02 -0700197config ROCKCHIP_TIMER
198 bool "Rockchip timer support"
maxims@google.com4697abe2017-01-18 13:44:55 -0800199 depends on TIMER
maxims@google.com4697abe2017-01-18 13:44:55 -0800200 help
Bin Meng73fe4112018-10-10 22:07:02 -0700201 Select this to enable support for the timer found on
202 Rockchip devices.
203
204config SANDBOX_TIMER
205 bool "Sandbox timer support"
206 depends on SANDBOX && TIMER
207 help
208 Select this to enable an emulated timer for sandbox. It gets
209 time from host os.
maxims@google.com4697abe2017-01-18 13:44:55 -0800210
Patrice Chotard347cb2e2017-02-21 13:37:05 +0100211config STI_TIMER
212 bool "STi timer support"
213 depends on TIMER
214 default y if ARCH_STI
215 help
216 Select this to enable a timer for STi devices.
217
Patrice Chotard5120a082018-02-07 10:44:45 +0100218config STM32_TIMER
Bin Meng73fe4112018-10-10 22:07:02 -0700219 bool "STM32 timer support"
Patrice Chotard5120a082018-02-07 10:44:45 +0100220 depends on TIMER
221 help
222 Select this to enable support for the timer found on
223 STM32 devices.
224
Bin Meng73fe4112018-10-10 22:07:02 -0700225config X86_TSC_TIMER
226 bool "x86 Time-Stamp Counter (TSC) timer support"
227 depends on TIMER && X86
Mario Six2c217492018-08-06 10:23:38 +0200228 help
Bin Meng73fe4112018-10-10 22:07:02 -0700229 Select this to enable Time-Stamp Counter (TSC) timer for x86.
Mario Six2c217492018-08-06 10:23:38 +0200230
Simon Glass77dd7c62019-12-06 21:41:49 -0700231config X86_TSC_READ_BASE
232 bool "Read the TSC timer base on start-up"
233 depends on X86_TSC_TIMER
234 help
235 On x86 platforms the TSC timer tick starts at the value 0 on reset.
236 This it makes no sense to read the timer on boot and use that as the
237 base, since we will miss some time taken to load U-Boot, etc. This
238 delay is controlled by the SoC and we cannot reduce it, but for
239 bootstage we want to record the time since reset as accurately as
240 possible.
241
242 The only exception is when U-Boot is used as a secondary bootloader,
243 where this option should be enabled.
244
Simon Glass642e8482019-12-06 21:41:50 -0700245config TPL_X86_TSC_TIMER_NATIVE
246 bool "x86 TSC timer uses native calibration"
247 depends on TPL && X86_TSC_TIMER
248 help
249 Selects native timer calibration for TPL and don't include the other
250 methods in the code. This helps to reduce code size in TPL and works
251 on fairly modern Intel chips. Code-size reductions is about 700
252 bytes.
253
Ryder Leed3c36062018-11-15 10:07:56 +0800254config MTK_TIMER
255 bool "MediaTek timer support"
256 depends on TIMER
257 help
258 Select this to enable support for the timer found on
259 MediaTek devices.
260
Claudiu Bezneaed1b7262020-09-07 18:36:33 +0300261config MCHP_PIT64B_TIMER
262 bool "Microchip 64-bit periodic interval timer support"
263 depends on TIMER
264 help
265 Select this to enable support for Microchip 64-bit periodic
266 interval timer.
267
Giulio Benettif8c85732021-05-13 12:18:31 +0200268config IMX_GPT_TIMER
269 bool "NXP i.MX GPT timer support"
270 depends on TIMER
271 help
272 Select this to enable support for the timer found on
273 NXP i.MX devices.
274
Thomas Chouc8a7ba92015-10-09 13:46:34 +0800275endmenu