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Masahiro Yamada509eb672014-11-26 18:33:59 +09001/*
2 * Device Tree Source for UniPhier PH1-Pro4 SoC
3 *
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +09004 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada509eb672014-11-26 18:33:59 +09005 *
Masahiro Yamada13b2ba12015-06-30 18:27:01 +09006 * SPDX-License-Identifier: GPL-2.0+ X11
Masahiro Yamada509eb672014-11-26 18:33:59 +09007 */
8
9/include/ "skeleton.dtsi"
10
11/ {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090012 compatible = "socionext,ph1-pro4";
Masahiro Yamada509eb672014-11-26 18:33:59 +090013
14 cpus {
Masahiro Yamada509eb672014-11-26 18:33:59 +090015 #address-cells = <1>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +090016 #size-cells = <0>;
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090017 enable-method = "socionext,uniphier-smp";
Masahiro Yamada509eb672014-11-26 18:33:59 +090018
19 cpu@0 {
20 device_type = "cpu";
21 compatible = "arm,cortex-a9";
22 reg = <0>;
23 };
24
25 cpu@1 {
26 device_type = "cpu";
27 compatible = "arm,cortex-a9";
28 reg = <1>;
29 };
30 };
31
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090032 clocks {
33 arm_timer_clk: arm_timer_clk {
34 #clock-cells = <0>;
35 compatible = "fixed-clock";
36 clock-frequency = <50000000>;
37 };
Masahiro Yamadad243c182015-08-28 22:33:13 +090038
39 uart_clk: uart_clk {
40 #clock-cells = <0>;
41 compatible = "fixed-clock";
42 clock-frequency = <73728000>;
43 };
44
45 i2c_clk: i2c_clk {
46 #clock-cells = <0>;
47 compatible = "fixed-clock";
48 clock-frequency = <50000000>;
49 };
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090050 };
51
Masahiro Yamada509eb672014-11-26 18:33:59 +090052 soc {
53 compatible = "simple-bus";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 ranges;
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090057 interrupt-parent = <&intc>;
58
59 extbus: extbus {
60 compatible = "simple-bus";
61 #address-cells = <2>;
62 #size-cells = <1>;
63 };
Masahiro Yamada625177d2014-11-26 18:34:00 +090064
Masahiro Yamadad243c182015-08-28 22:33:13 +090065 serial0: serial@54006800 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090066 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +090067 status = "disabled";
Masahiro Yamadad243c182015-08-28 22:33:13 +090068 reg = <0x54006800 0x40>;
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_uart0>;
71 interrupts = <0 33 4>;
72 clocks = <&uart_clk>;
Masahiro Yamada625177d2014-11-26 18:34:00 +090073 clock-frequency = <73728000>;
74 };
75
Masahiro Yamadad243c182015-08-28 22:33:13 +090076 serial1: serial@54006900 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090077 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +090078 status = "disabled";
Masahiro Yamadad243c182015-08-28 22:33:13 +090079 reg = <0x54006900 0x40>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&pinctrl_uart1>;
82 interrupts = <0 35 4>;
83 clocks = <&uart_clk>;
Masahiro Yamada625177d2014-11-26 18:34:00 +090084 clock-frequency = <73728000>;
85 };
86
Masahiro Yamadad243c182015-08-28 22:33:13 +090087 serial2: serial@54006a00 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090088 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +090089 status = "disabled";
Masahiro Yamadad243c182015-08-28 22:33:13 +090090 reg = <0x54006a00 0x40>;
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_uart2>;
93 interrupts = <0 37 4>;
94 clocks = <&uart_clk>;
Masahiro Yamada625177d2014-11-26 18:34:00 +090095 clock-frequency = <73728000>;
96 };
97
Masahiro Yamadad243c182015-08-28 22:33:13 +090098 serial3: serial@54006b00 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090099 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +0900100 status = "disabled";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900101 reg = <0x54006b00 0x40>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_uart3>;
104 interrupts = <0 29 4>;
105 clocks = <&uart_clk>;
Masahiro Yamada625177d2014-11-26 18:34:00 +0900106 clock-frequency = <73728000>;
107 };
Masahiro Yamada149c7512014-11-26 18:34:01 +0900108
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900109 i2c0: i2c@58780000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900110 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900111 status = "disabled";
112 reg = <0x58780000 0x80>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900113 #address-cells = <1>;
114 #size-cells = <0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_i2c0>;
117 interrupts = <0 41 4>;
118 clocks = <&i2c_clk>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900119 clock-frequency = <100000>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900120 };
121
122 i2c1: i2c@58781000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900123 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900124 status = "disabled";
125 reg = <0x58781000 0x80>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900126 #address-cells = <1>;
127 #size-cells = <0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_i2c1>;
130 interrupts = <0 42 4>;
131 clocks = <&i2c_clk>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900132 clock-frequency = <100000>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900133 };
134
135 i2c2: i2c@58782000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900136 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900137 status = "disabled";
138 reg = <0x58782000 0x80>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900139 #address-cells = <1>;
140 #size-cells = <0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_i2c2>;
143 interrupts = <0 43 4>;
144 clocks = <&i2c_clk>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900145 clock-frequency = <100000>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900146 };
147
148 i2c3: i2c@58783000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900149 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900150 status = "disabled";
151 reg = <0x58783000 0x80>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900152 #address-cells = <1>;
153 #size-cells = <0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900154 pinctrl-names = "default";
155 pinctrl-0 = <&pinctrl_i2c3>;
156 interrupts = <0 44 4>;
157 clocks = <&i2c_clk>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900158 clock-frequency = <100000>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900159 };
160
161 /* i2c4 does not exist */
162
Masahiro Yamadad243c182015-08-28 22:33:13 +0900163 /* chip-internal connection for DMD */
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900164 i2c5: i2c@58785000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900165 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900166 reg = <0x58785000 0x80>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900167 #address-cells = <1>;
168 #size-cells = <0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900169 interrupts = <0 25 4>;
170 clocks = <&i2c_clk>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900171 clock-frequency = <400000>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900172 };
173
Masahiro Yamadad243c182015-08-28 22:33:13 +0900174 /* chip-internal connection for HDMI */
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900175 i2c6: i2c@58786000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900176 compatible = "socionext,uniphier-fi2c";
Masahiro Yamadad243c182015-08-28 22:33:13 +0900177 reg = <0x58786000 0x80>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900178 #address-cells = <1>;
179 #size-cells = <0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900180 interrupts = <0 26 4>;
181 clocks = <&i2c_clk>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900182 clock-frequency = <400000>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900183 };
184
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +0900185 system-bus-controller-misc@59800000 {
186 compatible = "socionext,uniphier-system-bus-controller-misc",
187 "syscon";
188 reg = <0x59800000 0x2000>;
189 };
190
Masahiro Yamadade01a762015-02-27 02:26:59 +0900191 usb2: usb@5a800100 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900192 compatible = "socionext,uniphier-ehci", "generic-ehci";
Masahiro Yamada149c7512014-11-26 18:34:01 +0900193 status = "disabled";
194 reg = <0x5a800100 0x100>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_usb2>;
197 interrupts = <0 80 4>;
Masahiro Yamada149c7512014-11-26 18:34:01 +0900198 };
199
Masahiro Yamadade01a762015-02-27 02:26:59 +0900200 usb3: usb@5a810100 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900201 compatible = "socionext,uniphier-ehci", "generic-ehci";
Masahiro Yamada149c7512014-11-26 18:34:01 +0900202 status = "disabled";
203 reg = <0x5a810100 0x100>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_usb3>;
206 interrupts = <0 81 4>;
Masahiro Yamada149c7512014-11-26 18:34:01 +0900207 };
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900208
Masahiro Yamadade01a762015-02-27 02:26:59 +0900209 usb0: usb@65a00000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900210 compatible = "socionext,uniphier-xhci", "generic-xhci";
Masahiro Yamadade01a762015-02-27 02:26:59 +0900211 status = "disabled";
212 reg = <0x65a00000 0x100>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900213 pinctrl-names = "default";
214 pinctrl-0 = <&pinctrl_usb0>;
215 interrupts = <0 134 4>;
Masahiro Yamadade01a762015-02-27 02:26:59 +0900216 };
217
218 usb1: usb@65c00000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900219 compatible = "socionext,uniphier-xhci", "generic-xhci";
Masahiro Yamadade01a762015-02-27 02:26:59 +0900220 status = "disabled";
221 reg = <0x65c00000 0x100>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_usb1>;
224 interrupts = <0 135 4>;
225 };
226
227 pinctrl: pinctrl@5f801000 {
228 compatible = "socionext,ph1-pro4-pinctrl",
229 "syscon";
230 reg = <0x5f801000 0xe00>;
Masahiro Yamadade01a762015-02-27 02:26:59 +0900231 };
232
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +0900233 timer@60000200 {
234 compatible = "arm,cortex-a9-global-timer";
235 reg = <0x60000200 0x20>;
236 interrupts = <1 11 0x304>;
237 clocks = <&arm_timer_clk>;
238 };
239
240 timer@60000600 {
241 compatible = "arm,cortex-a9-twd-timer";
242 reg = <0x60000600 0x20>;
243 interrupts = <1 13 0x304>;
244 clocks = <&arm_timer_clk>;
245 };
246
247 intc: interrupt-controller@60001000 {
248 compatible = "arm,cortex-a9-gic";
249 #interrupt-cells = <3>;
250 interrupt-controller;
251 reg = <0x60001000 0x1000>,
252 <0x60000100 0x100>;
253 };
254
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900255 nand: nand@68000000 {
256 compatible = "denali,denali-nand-dt";
257 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
258 reg-names = "nand_data", "denali_reg";
259 };
Masahiro Yamada509eb672014-11-26 18:33:59 +0900260 };
261};
Masahiro Yamadad243c182015-08-28 22:33:13 +0900262
263/include/ "uniphier-pinctrl.dtsi"