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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Heiko Schochere379c032014-07-18 06:07:22 +02002/*
Heiko Schocherb4b39a72015-01-20 10:06:18 +01003 * (C) Copyright 2015
Heiko Schochere379c032014-07-18 06:07:22 +02004 * (C) Copyright 2014
5 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
6 *
7 * Based on:
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
9 *
10 * Configuration settings for the Freescale i.MX6Q SabreSD board.
Heiko Schochere379c032014-07-18 06:07:22 +020011 */
12#ifndef __ARISTAINETOS_CONFIG_H
13#define __ARISTAINETOS_CONFIG_H
14
Heiko Schocher7254d922015-05-18 13:32:31 +020015#define CONFIG_SYS_BOARD_VERSION 1
Mario Six5bc05432018-03-28 14:38:20 +020016#define CONFIG_HOSTNAME "aristainetos"
Heiko Schocher7254d922015-05-18 13:32:31 +020017#define CONFIG_BOARDNAME "aristainetos"
Heiko Schochere379c032014-07-18 06:07:22 +020018
Heiko Schochere379c032014-07-18 06:07:22 +020019#define CONFIG_MXC_UART_BASE UART5_BASE
Simon Glass12ca05a2016-10-17 20:12:39 -060020#define CONSOLE_DEV "ttymxc4"
Heiko Schochere379c032014-07-18 06:07:22 +020021
Heiko Schochere379c032014-07-18 06:07:22 +020022#define CONFIG_FEC_XCV_TYPE RMII
Heiko Schochere379c032014-07-18 06:07:22 +020023
Heiko Schocher7254d922015-05-18 13:32:31 +020024#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
Heiko Schocherb4b39a72015-01-20 10:06:18 +010025 "board_type=aristainetos7@1\0" \
Heiko Schocherb4b39a72015-01-20 10:06:18 +010026 "mtdids=nand0=gpmi-nand,nor0=spi3.0\0" \
27 "mtdparts=mtdparts=spi3.0:832k(u-boot),64k(env),64k(env-red)," \
28 "-(rescue-system);gpmi-nand:-(ubi)\0" \
29 "addmisc=setenv bootargs ${bootargs} consoleblank=0\0" \
30 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
Heiko Schocherb4b39a72015-01-20 10:06:18 +010031 "ubiargs=setenv bootargs console=${console},${baudrate} " \
Heiko Schocher96270842015-08-24 11:36:40 +020032 "ubi.mtd=0,2048 root=ubi0:rootfs rootfstype=ubifs\0 " \
33 "ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
34 "ubifsload ${fit_addr_r} /boot/system.itb; " \
35 "imi ${fit_addr_r}\0 "
Heiko Schochere379c032014-07-18 06:07:22 +020036
37#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15)
38#define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(3, 31)
Heiko Schocher7254d922015-05-18 13:32:31 +020039#define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15)
Heiko Schochere379c032014-07-18 06:07:22 +020040
Heiko Schocher7254d922015-05-18 13:32:31 +020041#include "aristainetos-common.h"
Heiko Schochere379c032014-07-18 06:07:22 +020042
Heiko Schochere379c032014-07-18 06:07:22 +020043#endif /* __ARISTAINETOS_CONFIG_H */