blob: 20c7e489c1ca945eb025953beb72af5411153adc [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
SRICHARAN R21144292012-03-12 02:25:48 +00002/*
Nishanth Menoncb199102013-03-26 05:20:54 +00003 * (C) Copyright 2012-2013
SRICHARAN R21144292012-03-12 02:25:48 +00004 * Texas Instruments, <www.ti.com>
SRICHARAN R21144292012-03-12 02:25:48 +00005 */
Nishanth Menonda2cc452013-03-26 05:20:58 +00006#ifndef PALMAS_H
7#define PALMAS_H
SRICHARAN R21144292012-03-12 02:25:48 +00008
9#include <common.h>
10#include <i2c.h>
11
Lubomir Popove9090fa2013-06-06 04:16:40 +000012/* I2C chip addresses, TW6035/37 */
13#define TWL603X_CHIP_P1 0x48 /* Page 1 */
14#define TWL603X_CHIP_P2 0x49 /* Page 2 */
15#define TWL603X_CHIP_P3 0x4a /* Page 3 */
SRICHARAN R21144292012-03-12 02:25:48 +000016
Lubomir Popove9090fa2013-06-06 04:16:40 +000017/* TPS659038/39 */
18#define TPS65903X_CHIP_P1 0x58 /* Page 1 */
19
20/* Page 1 registers (0x1XY translates to page 1, reg addr 0xXY): */
21
22/* LDO1 control/voltage */
23#define LDO1_CTRL 0x50
24#define LDO1_VOLTAGE 0x51
25
Lokesh Vutlab4b06002016-11-23 13:25:28 +053026/* LDO1 control/voltage for LP873x */
27#define LP873X_LDO1_ADDR 0x60
28#define LP873X_LDO1_CTRL 0x9
29#define LP873X_LDO1_VOLTAGE 0xa
30#define LP873X_LDO_VOLT_3V0 0x19
31#define LP873X_LDO_VOLT_1V8 0xa
32#define LP873X_LDO_CTRL_EN (0x1 << 0)
33#define LP873X_LDO_CTRL_EN_PINCTRL (0x1 << 1)
34#define LP873X_LDO_CTRL_RDIS_EN (0x1 << 2)
35
Dmitry Lifshitz35fe1cb2014-04-27 13:17:26 +030036/* LDO2 control/voltage */
37#define LDO2_CTRL 0x52
38#define LDO2_VOLTAGE 0x53
39
Lokesh Vutlacd43b512017-08-21 12:50:57 +053040/* LDO2 control/voltage */
41#define LDO4_CTRL 0x5e
42#define LDO4_VOLTAGE 0x5f
43
Lubomir Popove9090fa2013-06-06 04:16:40 +000044/* LDO9 control/voltage */
SRICHARAN R21144292012-03-12 02:25:48 +000045#define LDO9_CTRL 0x60
46#define LDO9_VOLTAGE 0x61
47
Lubomir Popove9090fa2013-06-06 04:16:40 +000048/* LDOUSB control/voltage */
49#define LDOUSB_CTRL 0x64
50#define LDOUSB_VOLTAGE 0x65
Dan Murphy1bd435b2013-08-26 08:54:49 -050051#define LDO_CTRL 0x6a
Lubomir Popove9090fa2013-06-06 04:16:40 +000052
53/* Control of 32 kHz audio clock */
54#define CLK32KGAUDIO_CTRL 0xd5
55
56/* SYSEN2_CTRL for VCC_3v3_AUX supply on the sEVM */
57#define SYSEN2_CTRL 0xd9
58
59/*
60 * Bit field definitions for LDOx_CTRL, SYSENx_CTRL
61 * and some other xxx_CTRL resources:
62 */
63#define LDO9_BYP_EN (1 << 6) /* LDO9 only! */
64#define RSC_STAT_ON (1 << 4) /* RO status bit! */
65#define RSC_MODE_SLEEP (1 << 2)
66#define RSC_MODE_ACTIVE (1 << 0)
67
68/* Some LDO voltage values */
69#define LDO_VOLT_OFF 0
70#define LDO_VOLT_1V8 0x13
71#define LDO_VOLT_3V0 0x2b
72#define LDO_VOLT_3V3 0x31
73/* Request bypass, LDO9 only */
74#define LDO9_BYPASS 0x3f
75
76/* SMPS7_CTRL */
77#define SMPS7_CTRL 0x30
78
79/* SMPS9_CTRL */
80#define SMPS9_CTRL 0x38
81#define SMPS9_VOLTAGE 0x3b
82
Dan Murphy1bd435b2013-08-26 08:54:49 -050083/* SMPS10_CTRL */
84#define SMPS10_CTRL 0x3c
85#define SMPS10_MODE_ACTIVE_D 0x0d
86
Lubomir Popove9090fa2013-06-06 04:16:40 +000087/* Bit field definitions for SMPSx_CTRL */
88#define SMPS_MODE_ACT_AUTO 1
89#define SMPS_MODE_ACT_ECO 2
90#define SMPS_MODE_ACT_FPWM 3
91#define SMPS_MODE_SLP_AUTO (1 << 2)
92#define SMPS_MODE_SLP_ECO (2 << 2)
93#define SMPS_MODE_SLP_FPWM (3 << 2)
94
95/*
96 * Some popular SMPS voltages, all with RANGE=1; note
97 * that RANGE cannot be changed on the fly
98 */
99#define SMPS_VOLT_OFF 0
100#define SMPS_VOLT_1V2 0x90
101#define SMPS_VOLT_1V8 0xae
102#define SMPS_VOLT_2V1 0xbd
103#define SMPS_VOLT_3V0 0xea
104#define SMPS_VOLT_3V3 0xf9
105
106/* Backup Battery & VRTC Control */
107#define BB_VRTC_CTRL 0xa8
108/* Bit definitions for BB_VRTC_CTRL */
109#define VRTC_EN_SLP (1 << 6)
110#define VRTC_EN_OFF (1 << 5)
111#define VRTC_PWEN (1 << 4)
112#define BB_LOW_ICHRG (1 << 3)
113#define BB_HIGH_ICHRG (0 << 3)
114#define BB_VSEL_3V0 (0 << 1)
115#define BB_VSEL_2V5 (1 << 1)
116#define BB_VSEL_3V15 (2 << 1)
117#define BB_VSEL_VBAT (3 << 1)
118#define BB_CHRG_EN (1 << 0)
SRICHARAN R21144292012-03-12 02:25:48 +0000119
Jean-Jacques Hiblotfb1b7712018-12-07 14:50:46 +0100120#ifndef CONFIG_DM_I2C
Nishanth Menonff2d57e2013-03-26 05:20:57 +0000121/*
122 * Functions to read and write from TPS659038/TWL6035/TWL6037
123 * or other Palmas family of TI PMICs
124 */
125static inline int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
126{
127 return i2c_write(chip_no, reg, 1, &val, 1);
128}
129
130static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
131{
132 return i2c_read(chip_no, reg, 1, val, 1);
133}
Jean-Jacques Hiblotfb1b7712018-12-07 14:50:46 +0100134#else
135int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val);
136int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val);
137#endif
Nishanth Menonff2d57e2013-03-26 05:20:57 +0000138
Nishanth Menon12733882013-03-26 05:20:55 +0000139void palmas_init_settings(void);
Lokesh Vutladb4fce82017-08-21 12:50:50 +0530140int palmas_mmc1_poweron_ldo(uint ldo_volt, uint ldo_ctrl, uint voltage);
Lokesh Vutlab4b06002016-11-23 13:25:28 +0530141int lp873x_mmc1_poweron_ldo(uint voltage);
Lubomir Popove9090fa2013-06-06 04:16:40 +0000142int twl603x_mmc1_set_ldo9(u8 vsel);
143int twl603x_audio_power(u8 on);
144int twl603x_enable_bb_charge(u8 bb_fields);
Dan Murphy1bd435b2013-08-26 08:54:49 -0500145int palmas_enable_ss_ldo(void);
Nishanth Menonda2cc452013-03-26 05:20:58 +0000146
147#endif /* PALMAS_H */