Heiko Schocher | b2f97cf | 2014-07-18 06:07:19 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * (C) Copyright 2014 |
| 3 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. |
| 4 | * |
| 5 | * Basic support for the pwm modul on imx6. |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <div64.h> |
| 12 | #include <pwm.h> |
| 13 | #include <asm/arch/imx-regs.h> |
| 14 | #include <asm/io.h> |
| 15 | #include "pwm-imx-util.h" |
| 16 | |
| 17 | int pwm_init(int pwm_id, int div, int invert) |
| 18 | { |
| 19 | struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id); |
| 20 | |
| 21 | writel(0, &pwm->ir); |
| 22 | return 0; |
| 23 | } |
| 24 | |
| 25 | int pwm_config(int pwm_id, int duty_ns, int period_ns) |
| 26 | { |
| 27 | struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id); |
| 28 | unsigned long period_cycles, duty_cycles, prescale; |
| 29 | u32 cr; |
| 30 | |
| 31 | pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles, |
| 32 | &prescale); |
| 33 | |
| 34 | cr = PWMCR_PRESCALER(prescale) | |
| 35 | PWMCR_DOZEEN | PWMCR_WAITEN | |
| 36 | PWMCR_DBGEN | PWMCR_CLKSRC_IPG_HIGH; |
| 37 | |
| 38 | writel(cr, &pwm->cr); |
| 39 | /* set duty cycles */ |
| 40 | writel(duty_cycles, &pwm->sar); |
| 41 | /* set period cycles */ |
| 42 | writel(period_cycles, &pwm->pr); |
| 43 | return 0; |
| 44 | } |
| 45 | |
| 46 | int pwm_enable(int pwm_id) |
| 47 | { |
| 48 | struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id); |
| 49 | |
| 50 | setbits_le32(&pwm->cr, PWMCR_EN); |
| 51 | return 0; |
| 52 | } |
| 53 | |
| 54 | void pwm_disable(int pwm_id) |
| 55 | { |
| 56 | struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id); |
| 57 | |
| 58 | clrbits_le32(&pwm->cr, PWMCR_EN); |
| 59 | } |