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Nobuhiro Iwamatsu74d9c162009-06-25 16:31:26 +09001/*
2 * Configuation settings for the ESPT-GIGA board
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu74d9c162009-06-25 16:31:26 +09008 */
9
10#ifndef __ESPT_H
11#define __ESPT_H
12
Nobuhiro Iwamatsu74d9c162009-06-25 16:31:26 +090013#define CONFIG_CPU_SH7763 1
14#define CONFIG_ESPT 1
15#define __LITTLE_ENDIAN 1
16
17/*
18 * Command line configuration.
19 */
20#define CONFIG_CMD_SDRAM
21#define CONFIG_CMD_FLASH
22#define CONFIG_CMD_MEMORY
Yoshihiro Shimoda25a028b2011-10-31 10:44:19 +090023#define CONFIG_CMD_MII
Nobuhiro Iwamatsu74d9c162009-06-25 16:31:26 +090024#define CONFIG_CMD_PING
25#define CONFIG_CMD_ENV
26#define CONFIG_CMD_NFS
27#define CONFIG_CMD_SAVEENV
28
29#define CONFIG_BOOTDELAY -1
30#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
31#define CONFIG_ENV_OVERWRITE 1
32
33#define CONFIG_VERSION_VARIABLE
34#undef CONFIG_SHOW_BOOT_PROGRESS
35
36/* SCIF */
37#define CONFIG_SCIF_CONSOLE 1
38#define CONFIG_BAUDRATE 115200
39#define CONFIG_CONS_SCIF0 1
40
Nobuhiro Iwamatsu54fbf472011-01-17 21:15:44 +090041#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
Nobuhiro Iwamatsu74d9c162009-06-25 16:31:26 +090042#define CONFIG_SYS_LONGHELP /* undef to save memory */
Nobuhiro Iwamatsu74d9c162009-06-25 16:31:26 +090043#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
44#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
45#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
46#define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments
47 passed to kernel */
48#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
49 settings for this board */
50
51/* SDRAM */
52#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
53#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
54#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
55#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
56
57/* Flash(NOR) S29JL064H */
58#define CONFIG_SYS_FLASH_BASE (0xA0000000)
59#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
60#define CONFIG_SYS_MAX_FLASH_BANKS (1)
61#define CONFIG_SYS_MAX_FLASH_SECT (150)
62
63/* U-boot setting */
64#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
65#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
66#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
67/* Size of DRAM reserved for malloc() use */
68#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
Nobuhiro Iwamatsu74d9c162009-06-25 16:31:26 +090069#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
70
71#define CONFIG_SYS_FLASH_CFI
72#define CONFIG_FLASH_CFI_DRIVER
73#undef CONFIG_SYS_FLASH_QUIET_TEST
74#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
75/* Timeout for Flash erase operations (in ms) */
76#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
77/* Timeout for Flash write operations (in ms) */
78#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
79/* Timeout for Flash set sector lock bit operations (in ms) */
80#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
81/* Timeout for Flash clear lock bit operations (in ms) */
82#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
83/* Use hardware flash sectors protection instead of U-Boot software protection */
84#undef CONFIG_SYS_FLASH_PROTECTION
85#undef CONFIG_SYS_DIRECT_FLASH_TFTP
86#define CONFIG_ENV_IS_IN_FLASH
87#define CONFIG_ENV_SECT_SIZE (128 * 1024)
88#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
89#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
90/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
91#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
92#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
93#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
94
95/* Clock */
96#define CONFIG_SYS_CLK_FREQ 66666666
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +090097#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
98#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Nobuhiro Iwamatsu74d9c162009-06-25 16:31:26 +090099#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu74d9c162009-06-25 16:31:26 +0900100
101/* Ether */
Nobuhiro Iwamatsu74d9c162009-06-25 16:31:26 +0900102#define CONFIG_SH_ETHER 1
103#define CONFIG_SH_ETHER_USE_PORT (1)
104#define CONFIG_SH_ETHER_PHY_ADDR (0x00)
Yoshihiro Shimoda25a028b2011-10-31 10:44:19 +0900105#define CONFIG_PHYLIB
106#define CONFIG_BITBANGMII
107#define CONFIG_BITBANGMII_MULTI
Nobuhiro Iwamatsua80a6612012-05-16 10:23:21 +0900108#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
Nobuhiro Iwamatsu74d9c162009-06-25 16:31:26 +0900109
110#endif /* __SH7763RDP_H */