| Ralph Siemsen | afdfcb1 | 2023-05-12 21:36:57 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: BSD-2-Clause */ |
| 2 | /* |
| 3 | * Renesas RZ/N1 Package Table format |
| 4 | * (C) 2015-2016 Renesas Electronics Europe, LTD |
| 5 | * All rights reserved. |
| 6 | * |
| 7 | * Converted to mkimage plug-in |
| 8 | * (C) Copyright 2022 Schneider Electric |
| 9 | */ |
| 10 | |
| 11 | #ifndef _SPKGIMAGE_H_ |
| 12 | #define _SPKGIMAGE_H_ |
| 13 | |
| 14 | #ifdef __GNUC__ |
| 15 | #define __packed __attribute((packed)) |
| 16 | #else |
| 17 | #define __packed |
| 18 | #endif |
| 19 | |
| 20 | #define SPKG_HEADER_MARKER {'R', 'Z', 'N', '1'} |
| 21 | #define SPKG_HEADER_SIZE 24 |
| 22 | #define SPKG_HEADER_COUNT 8 |
| 23 | #define SPKG_BLP_SIZE 264 |
| 24 | #define SPKG_CRC_SIZE 4 |
| 25 | |
| 26 | /** |
| 27 | * struct spkg_hdr - SPKG header |
| 28 | * @marker: magic pattern "RZN1" |
| 29 | * @version: header version (currently 1) |
| 30 | * @ecc: ECC enable and block size. |
| 31 | * @ecc_scheme: ECC algorithm selction |
| 32 | * @ecc_bytes: ECC bytes per block |
| 33 | * @payload_length: length of the payload (including CRC) |
| 34 | * @load_address: address in memory where payload should be loaded |
| 35 | * @execution_offset: offset from @load_address where execution starts |
| 36 | * @crc: 32-bit CRC of the above header fields |
| 37 | * |
| 38 | * SPKG header format is defined by Renesas. It is documented in the Reneasas |
| 39 | * RZ/N1 User Manual, Chapter 7.4 ("SPKG format"). |
| 40 | * |
| 41 | * The BootROM searches this header in order to find and validate the boot |
| 42 | * payload. It is therefore mandatory to wrap the payload in this header. |
| 43 | * |
| 44 | * The ECC-related fields @ecc @ecc_scheme @ecc_bytes are used only when |
| 45 | * booting from NAND flash, and they are only used while fetching the payload. |
| 46 | * These values are used to initialize the ECC controller. To avoid using |
| 47 | * non-portable bitfields, struct spkg_hdr uses uint8_t for these fields, so |
| 48 | * the user must shift the values into the correct spot. |
| 49 | * |
| 50 | * The payload will be loaded into memory at @payload_address. |
| 51 | * Execution then jumps to @payload_address + @execution_offset. |
| 52 | * The LSB of @execution_offset selects between ARM and Thumb mode, |
| 53 | * as per the usual ARM interworking convention. |
| 54 | */ |
| 55 | struct spkg_hdr { |
| 56 | uint8_t marker[4]; /* aka magic */ |
| 57 | uint8_t version; |
| 58 | uint8_t ecc; |
| 59 | uint8_t ecc_scheme; |
| 60 | uint8_t ecc_bytes; |
| 61 | uint32_t payload_length; /* only HIGHER 24 bits */ |
| 62 | uint32_t load_address; |
| 63 | uint32_t execution_offset; |
| 64 | uint32_t crc; /* of this header */ |
| 65 | } __packed; |
| 66 | |
| 67 | /** |
| 68 | * struct spkg_file - complete SPKG image |
| 69 | * |
| 70 | * A SPKG image consists of 8 identical copies of struct spkg_hdr, each one |
| 71 | * occupying 24 bytes, for a total of 192 bytes. |
| 72 | * |
| 73 | * This is followed by the payload (the u-boot binary), and a 32-bit CRC. |
| 74 | * |
| 75 | * Optionally, the payload can be being with security header ("BLp_header"). |
| 76 | * This feature is not currently supported in mkimage. |
| 77 | * |
| 78 | * The payload is typically padded with 0xFF bytes so as to bring the total |
| 79 | * image size to a multiple of the flash erase size (often 64kB). |
| 80 | */ |
| 81 | struct spkg_file { |
| 82 | struct spkg_hdr header[SPKG_HEADER_COUNT]; |
| 83 | uint8_t payload[0]; |
| 84 | /* then the CRC */ |
| 85 | } __packed; |
| 86 | |
| 87 | #endif |