blob: 53ffbeef240fd176c828ac8979cbe3216388aecf [file] [log] [blame]
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +09001/*
2 * Configuation settings for the Hitachi Solution Engine 7722
3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __MS7722SE_H
26#define __MS7722SE_H
27
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090028#define CONFIG_SH 1
29#define CONFIG_SH4 1
30#define CONFIG_CPU_SH7722 1
31#define CONFIG_MS7722SE 1
32
33#define CONFIG_CMD_FLASH
Nobuhiro Iwamatsu57837582008-11-17 16:52:09 +090034#define CONFIG_CMD_JFFS2
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090035#define CONFIG_CMD_NET
Nobuhiro Iwamatsu57837582008-11-17 16:52:09 +090036#define CONFIG_CMD_NFS
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090037#define CONFIG_CMD_PING
38#define CONFIG_CMD_DFL
39#define CONFIG_CMD_SDRAM
Nobuhiro Iwamatsu57837582008-11-17 16:52:09 +090040#define CONFIG_CMD_MEMORY
Mike Frysingerbdab39d2009-01-28 19:08:14 -050041#define CONFIG_CMD_SAVEENV
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090042
43#define CONFIG_BAUDRATE 115200
44#define CONFIG_BOOTDELAY 3
Wolfgang Denk53677ef2008-05-20 16:00:29 +020045#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090046
47#define CONFIG_VERSION_VARIABLE
48#undef CONFIG_SHOW_BOOT_PROGRESS
49
50/* SMC9111 */
51#define CONFIG_DRIVER_SMC91111
52#define CONFIG_SMC91111_BASE (0xB8000000)
53
54/* MEMORY */
55#define MS7722SE_SDRAM_BASE (0x8C000000)
56#define MS7722SE_FLASH_BASE_1 (0xA0000000)
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090057#define MS7722SE_FLASH_BANK_SIZE (8*1024 * 1024)
58
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020059#define CONFIG_SYS_LONGHELP /* undef to save memory */
60#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
61#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
62#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
63#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
64#define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */
65#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090066
67/* SCIF */
Jean-Christophe PLAGNIOL-VILLARD6c58a032008-08-13 01:40:38 +020068#define CONFIG_SCIF_CONSOLE 1
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090069#define CONFIG_CONS_SCIF0 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020070#undef CONFIG_SYS_CONSOLE_INFO_QUIET /* Suppress display of console information at boot */
71#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
72#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090073
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020074#define CONFIG_SYS_MEMTEST_START (MS7722SE_SDRAM_BASE)
75#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090076
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077#undef CONFIG_SYS_ALT_MEMTEST /* Enable alternate, more extensive, memory test */
78#undef CONFIG_SYS_MEMTEST_SCRATCH /* Scratch address used by the alternate memory test */
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090079
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020080#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* Enable temporary baudrate change while serial download */
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090081
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#define CONFIG_SYS_SDRAM_BASE (MS7722SE_SDRAM_BASE)
83#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* maybe more, but if so u-boot doesn't know about it... */
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090084
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020085#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) /* default load address for scripts ?!? */
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090086
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020087#define CONFIG_SYS_MONITOR_BASE (MS7722SE_FLASH_BASE_1) /* Address of u-boot image
Wolfgang Denk53677ef2008-05-20 16:00:29 +020088 in Flash (NOT run time address in SDRAM) ?!? */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020089#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* */
90#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */
91#define CONFIG_SYS_GBL_DATA_SIZE (256) /* size in bytes reserved for initial data */
92#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090093
94/* FLASH */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020095#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +020096#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020097#undef CONFIG_SYS_FLASH_QUIET_TEST
98#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +090099
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200100#define CONFIG_SYS_FLASH_BASE (MS7722SE_FLASH_BASE_1) /* Physical start address of Flash memory */
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +0900101
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200102#define CONFIG_SYS_MAX_FLASH_SECT 150 /* Max number of sectors on each
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200103 Flash chip */
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +0900104
105/* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106#define CONFIG_SYS_MAX_FLASH_BANKS 2
107#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \
108 CONFIG_SYS_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +0900109 }
110
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) /* Timeout for Flash erase operations (in ms) */
112#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) /* Timeout for Flash write operations (in ms) */
113#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */
114#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +0900115
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200116#undef CONFIG_SYS_FLASH_PROTECTION /* Use hardware flash sectors protection instead of U-Boot software protection */
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +0900117
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#undef CONFIG_SYS_DIRECT_FLASH_TFTP
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +0900119
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200120#define CONFIG_ENV_IS_IN_FLASH
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +0900121#define CONFIG_ENV_OVERWRITE 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200122#define CONFIG_ENV_SECT_SIZE (8 * 1024)
123#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200124#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
125#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200126#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +0900128
129/* Board Clock */
130#define CONFIG_SYS_CLK_FREQ 33333333
Wolfgang Denk61fb15c52007-12-27 01:52:50 +0100131#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200132#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
Nobuhiro Iwamatsu6c0bbdc2007-09-23 02:31:13 +0900133
134#endif /* __MS7722SE_H */