blob: 62ed54fb4d667b96bb054f56e064c46a3fc93823 [file] [log] [blame]
Jean-Christophe PLAGNIOL-VILLARDb3acb6c2009-04-05 13:06:31 +02001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <asm/system.h>
26
27#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
28static void cp_delay (void)
29{
30 volatile int i;
31
32 /* copro seems to need some delay between reading and writing */
33 for (i = 0; i < 100; i++)
34 nop();
35}
36
37/* cache_bit must be either CR_I or CR_C */
38static void cache_enable(uint32_t cache_bit)
39{
40 uint32_t reg;
41
42 reg = get_cr(); /* get control reg. */
43 cp_delay();
44 set_cr(reg | cache_bit);
45}
46
47/* cache_bit must be either CR_I or CR_C */
48static void cache_disable(uint32_t cache_bit)
49{
50 uint32_t reg;
51
52 reg = get_cr();
53 cp_delay();
54 set_cr(reg & ~cache_bit);
55}
56#endif
57
58#ifdef CONFIG_SYS_NO_ICACHE
59void icache_enable (void)
60{
61 return;
62}
63
64void icache_disable (void)
65{
66 return;
67}
68
69int icache_status (void)
70{
71 return 0; /* always off */
72}
73#else
74void icache_enable(void)
75{
76 cache_enable(CR_I);
77}
78
79void icache_disable(void)
80{
81 cache_disable(CR_I);
82}
83
84int icache_status(void)
85{
86 return (get_cr() & CR_I) != 0;
87}
88#endif
89
90#ifdef CONFIG_SYS_NO_DCACHE
91void dcache_enable (void)
92{
93 return;
94}
95
96void dcache_disable (void)
97{
98 return;
99}
100
101int dcache_status (void)
102{
103 return 0; /* always off */
104}
105#else
106void dcache_enable(void)
107{
108 cache_enable(CR_C);
109}
110
111void dcache_disable(void)
112{
113 cache_disable(CR_C);
114}
115
116int dcache_status(void)
117{
118 return (get_cr() & CR_C) != 0;
119}
120#endif