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wdenk38635852002-08-27 05:55:31 +00001/*
2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk38635852002-08-27 05:55:31 +00006 */
7
d4f5c722005-08-12 21:16:13 +02008/*
9 * Support for read and write access to EEPROM like memory devices. This
10 * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
11 * FRAM devices read and write data at bus speed. In particular, there is no
Peter Meerwalde506a002012-02-08 05:31:53 +000012 * write delay. Also, there is no limit imposed on the number of bytes that can
d4f5c722005-08-12 21:16:13 +020013 * be transferred with a single read or write.
Wolfgang Denk6617aae2005-08-19 00:46:54 +020014 *
d4f5c722005-08-12 21:16:13 +020015 * Use the following configuration options to ensure no unneeded performance
16 * degradation (typical for EEPROM) is incured for FRAM memory:
Wolfgang Denk6617aae2005-08-19 00:46:54 +020017 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020018 * #define CONFIG_SYS_I2C_FRAM
19 * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
d4f5c722005-08-12 21:16:13 +020020 *
21 */
22
wdenk38635852002-08-27 05:55:31 +000023#include <common.h>
24#include <config.h>
25#include <command.h>
26#include <i2c.h>
27
wdenk38635852002-08-27 05:55:31 +000028extern void eeprom_init (void);
29extern int eeprom_read (unsigned dev_addr, unsigned offset,
30 uchar *buffer, unsigned cnt);
31extern int eeprom_write (unsigned dev_addr, unsigned offset,
32 uchar *buffer, unsigned cnt);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020033#if defined(CONFIG_SYS_EEPROM_WREN)
Stefan Roese98f4a3d2005-09-22 09:04:17 +020034extern int eeprom_write_enable (unsigned dev_addr, int state);
35#endif
wdenk38635852002-08-27 05:55:31 +000036
37
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020038#if defined(CONFIG_SYS_EEPROM_X40430)
wdenk38635852002-08-27 05:55:31 +000039 /* Maximum number of times to poll for acknowledge after write */
40#define MAX_ACKNOWLEDGE_POLLS 10
41#endif
42
43/* ------------------------------------------------------------------------- */
44
Jon Loeligerbaa26db2007-07-08 17:51:39 -050045#if defined(CONFIG_CMD_EEPROM)
Jeroen Hofstee0e350f82014-06-23 00:22:08 +020046static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenk38635852002-08-27 05:55:31 +000047{
48 const char *const fmt =
49 "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
50
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020051#if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
wdenk38635852002-08-27 05:55:31 +000052 if (argc == 6) {
53 ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
54 ulong addr = simple_strtoul (argv[3], NULL, 16);
55 ulong off = simple_strtoul (argv[4], NULL, 16);
56 ulong cnt = simple_strtoul (argv[5], NULL, 16);
57#else
58 if (argc == 5) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020059 ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
wdenk38635852002-08-27 05:55:31 +000060 ulong addr = simple_strtoul (argv[2], NULL, 16);
61 ulong off = simple_strtoul (argv[3], NULL, 16);
62 ulong cnt = simple_strtoul (argv[4], NULL, 16);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
wdenk38635852002-08-27 05:55:31 +000064
Heiko Schocher548738b2010-01-07 08:55:40 +010065# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
wdenk38635852002-08-27 05:55:31 +000066 eeprom_init ();
67# endif /* !CONFIG_SPI */
68
69 if (strcmp (argv[1], "read") == 0) {
70 int rcode;
71
72 printf (fmt, dev_addr, argv[1], addr, off, cnt);
73
74 rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
75
wdenk4b9206e2004-03-23 22:14:11 +000076 puts ("done\n");
wdenk38635852002-08-27 05:55:31 +000077 return rcode;
78 } else if (strcmp (argv[1], "write") == 0) {
79 int rcode;
80
81 printf (fmt, dev_addr, argv[1], addr, off, cnt);
82
83 rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
84
wdenk4b9206e2004-03-23 22:14:11 +000085 puts ("done\n");
wdenk38635852002-08-27 05:55:31 +000086 return rcode;
87 }
88 }
89
Simon Glass4c12eeb2011-12-10 08:44:01 +000090 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000091}
Jon Loeliger90253172007-07-10 11:02:44 -050092#endif
wdenk38635852002-08-27 05:55:31 +000093
94/*-----------------------------------------------------------------------
95 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020096 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
wdenk38635852002-08-27 05:55:31 +000097 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
98 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020099 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
wdenk38635852002-08-27 05:55:31 +0000100 * 0x00000nxx for EEPROM address selectors and page number at n.
101 */
102
Heiko Schocher548738b2010-01-07 08:55:40 +0100103#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200104#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2
105#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
wdenk38635852002-08-27 05:55:31 +0000106#endif
107#endif
108
109int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
110{
111 unsigned end = offset + cnt;
112 unsigned blk_off;
113 int rcode = 0;
114
115 /* Read data until done or would cross a page boundary.
116 * We must write the address again when changing pages
117 * because the next page may be in a different device.
118 */
119 while (offset < end) {
d4f5c722005-08-12 21:16:13 +0200120 unsigned alen, len;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200121#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c722005-08-12 21:16:13 +0200122 unsigned maxlen;
123#endif
124
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200125#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
wdenk38635852002-08-27 05:55:31 +0000126 uchar addr[2];
127
128 blk_off = offset & 0xFF; /* block offset */
129
130 addr[0] = offset >> 8; /* block number */
131 addr[1] = blk_off; /* block offset */
132 alen = 2;
133#else
134 uchar addr[3];
135
136 blk_off = offset & 0xFF; /* block offset */
137
138 addr[0] = offset >> 16; /* block number */
139 addr[1] = offset >> 8; /* upper address octet */
140 addr[2] = blk_off; /* lower address octet */
141 alen = 3;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
wdenk38635852002-08-27 05:55:31 +0000143
144 addr[0] |= dev_addr; /* insert device address */
145
d4f5c722005-08-12 21:16:13 +0200146 len = end - offset;
147
148 /*
149 * For a FRAM device there is no limit on the number of the
150 * bytes that can be ccessed with the single read or write
151 * operation.
152 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200153#if !defined(CONFIG_SYS_I2C_FRAM)
wdenk38635852002-08-27 05:55:31 +0000154 maxlen = 0x100 - blk_off;
155 if (maxlen > I2C_RXTX_LEN)
156 maxlen = I2C_RXTX_LEN;
wdenk38635852002-08-27 05:55:31 +0000157 if (len > maxlen)
158 len = maxlen;
d4f5c722005-08-12 21:16:13 +0200159#endif
160
Heiko Schocher548738b2010-01-07 08:55:40 +0100161#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
wdenk38635852002-08-27 05:55:31 +0000162 spi_read (addr, alen, buffer, len);
163#else
Kuo-Jung Su6ca6d082013-12-02 16:02:59 +0800164 if (i2c_read(addr[0], offset, alen - 1, buffer, len))
wdenk38635852002-08-27 05:55:31 +0000165 rcode = 1;
166#endif
167 buffer += len;
168 offset += len;
169 }
d4f5c722005-08-12 21:16:13 +0200170
wdenk38635852002-08-27 05:55:31 +0000171 return rcode;
172}
173
174/*-----------------------------------------------------------------------
175 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
wdenk38635852002-08-27 05:55:31 +0000177 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
178 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
wdenk38635852002-08-27 05:55:31 +0000180 * 0x00000nxx for EEPROM address selectors and page number at n.
181 */
182
183int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
184{
185 unsigned end = offset + cnt;
186 unsigned blk_off;
187 int rcode = 0;
188
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200189#if defined(CONFIG_SYS_EEPROM_X40430)
wdenk38635852002-08-27 05:55:31 +0000190 uchar contr_r_addr[2];
191 uchar addr_void[2];
192 uchar contr_reg[2];
193 uchar ctrl_reg_v;
194 int i;
195#endif
196
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200197#if defined(CONFIG_SYS_EEPROM_WREN)
Stefan Roese98f4a3d2005-09-22 09:04:17 +0200198 eeprom_write_enable (dev_addr,1);
199#endif
wdenk38635852002-08-27 05:55:31 +0000200 /* Write data until done or would cross a write page boundary.
201 * We must write the address again when changing pages
202 * because the address counter only increments within a page.
203 */
204
205 while (offset < end) {
d4f5c722005-08-12 21:16:13 +0200206 unsigned alen, len;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200207#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c722005-08-12 21:16:13 +0200208 unsigned maxlen;
209#endif
210
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200211#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
wdenk38635852002-08-27 05:55:31 +0000212 uchar addr[2];
213
214 blk_off = offset & 0xFF; /* block offset */
215
216 addr[0] = offset >> 8; /* block number */
217 addr[1] = blk_off; /* block offset */
218 alen = 2;
219#else
220 uchar addr[3];
221
222 blk_off = offset & 0xFF; /* block offset */
223
224 addr[0] = offset >> 16; /* block number */
225 addr[1] = offset >> 8; /* upper address octet */
226 addr[2] = blk_off; /* lower address octet */
227 alen = 3;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200228#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
wdenk38635852002-08-27 05:55:31 +0000229
230 addr[0] |= dev_addr; /* insert device address */
231
d4f5c722005-08-12 21:16:13 +0200232 len = end - offset;
233
234 /*
235 * For a FRAM device there is no limit on the number of the
Michael Jonesf9a78b82011-07-14 22:09:28 +0000236 * bytes that can be accessed with the single read or write
d4f5c722005-08-12 21:16:13 +0200237 * operation.
238 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200239#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c722005-08-12 21:16:13 +0200240
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200241#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
wdenk38635852002-08-27 05:55:31 +0000242
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200243#define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
wdenk38635852002-08-27 05:55:31 +0000244#define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
245
246 maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
247#else
248 maxlen = 0x100 - blk_off;
249#endif
250 if (maxlen > I2C_RXTX_LEN)
251 maxlen = I2C_RXTX_LEN;
252
wdenk38635852002-08-27 05:55:31 +0000253 if (len > maxlen)
254 len = maxlen;
d4f5c722005-08-12 21:16:13 +0200255#endif
256
Heiko Schocher548738b2010-01-07 08:55:40 +0100257#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
wdenk38635852002-08-27 05:55:31 +0000258 spi_write (addr, alen, buffer, len);
259#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200260#if defined(CONFIG_SYS_EEPROM_X40430)
wdenk38635852002-08-27 05:55:31 +0000261 /* Get the value of the control register.
262 * Set current address (internal pointer in the x40430)
263 * to 0x1ff.
264 */
265 contr_r_addr[0] = 9;
266 contr_r_addr[1] = 0xff;
267 addr_void[0] = 0;
268 addr_void[1] = addr[1];
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200269#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
270 contr_r_addr[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
271 addr_void[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
wdenk38635852002-08-27 05:55:31 +0000272#endif
273 contr_reg[0] = 0xff;
274 if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
275 rcode = 1;
276 }
277 ctrl_reg_v = contr_reg[0];
278
279 /* Are any of the eeprom blocks write protected?
280 */
281 if (ctrl_reg_v & 0x18) {
282 ctrl_reg_v &= ~0x18; /* reset block protect bits */
283 ctrl_reg_v |= 0x02; /* set write enable latch */
284 ctrl_reg_v &= ~0x04; /* clear RWEL */
285
286 /* Set write enable latch.
287 */
288 contr_reg[0] = 0x02;
289 if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
290 rcode = 1;
291 }
292
293 /* Set register write enable latch.
294 */
295 contr_reg[0] = 0x06;
296 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
297 rcode = 1;
298 }
299
300 /* Modify ctrl register.
301 */
302 contr_reg[0] = ctrl_reg_v;
303 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
304 rcode = 1;
305 }
306
307 /* The write (above) is an operation on NV memory.
308 * These can take some time (~5ms), and the device
309 * will not respond to further I2C messages till
310 * it's completed the write.
311 * So poll device for an I2C acknowledge.
312 * When we get one we know we can continue with other
313 * operations.
314 */
315 contr_reg[0] = 0;
316 for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
wdenkaacf9a42003-01-17 16:27:01 +0000317 if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
wdenk38635852002-08-27 05:55:31 +0000318 break; /* got ack */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200319#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
320 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
wdenk38635852002-08-27 05:55:31 +0000321#endif
322 }
323 if (i == MAX_ACKNOWLEDGE_POLLS) {
wdenk4b9206e2004-03-23 22:14:11 +0000324 puts ("EEPROM poll acknowledge failed\n");
wdenk38635852002-08-27 05:55:31 +0000325 rcode = 1;
326 }
327 }
328
329 /* Is the write enable latch on?.
330 */
331 else if (!(ctrl_reg_v & 0x02)) {
332 /* Set write enable latch.
333 */
334 contr_reg[0] = 0x02;
335 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
336 rcode = 1;
337 }
338 }
339 /* Write is enabled ... now write eeprom value.
340 */
341#endif
Kuo-Jung Su6ca6d082013-12-02 16:02:59 +0800342 if (i2c_write(addr[0], offset, alen - 1, buffer, len))
wdenk38635852002-08-27 05:55:31 +0000343 rcode = 1;
344
345#endif
346 buffer += len;
347 offset += len;
348
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200349#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
350 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
wdenk38635852002-08-27 05:55:31 +0000351#endif
352 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200353#if defined(CONFIG_SYS_EEPROM_WREN)
Stefan Roese98f4a3d2005-09-22 09:04:17 +0200354 eeprom_write_enable (dev_addr,0);
355#endif
wdenk38635852002-08-27 05:55:31 +0000356 return rcode;
357}
358
Heiko Schocher548738b2010-01-07 08:55:40 +0100359#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
wdenk6dd652f2003-06-19 23:40:20 +0000360int
361eeprom_probe (unsigned dev_addr, unsigned offset)
362{
363 unsigned char chip;
364
365 /* Probe the chip address
366 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200367#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
wdenk6dd652f2003-06-19 23:40:20 +0000368 chip = offset >> 8; /* block number */
369#else
370 chip = offset >> 16; /* block number */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200371#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
wdenk6dd652f2003-06-19 23:40:20 +0000372
373 chip |= dev_addr; /* insert device address */
374
375 return (i2c_probe (chip));
376}
377#endif
378
wdenk38635852002-08-27 05:55:31 +0000379/*-----------------------------------------------------------------------
380 * Set default values
381 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200382#ifndef CONFIG_SYS_I2C_SPEED
383#define CONFIG_SYS_I2C_SPEED 50000
wdenk38635852002-08-27 05:55:31 +0000384#endif
385
wdenk38635852002-08-27 05:55:31 +0000386void eeprom_init (void)
387{
Heiko Schocher548738b2010-01-07 08:55:40 +0100388
389#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
wdenk38635852002-08-27 05:55:31 +0000390 spi_init_f ();
391#endif
Valentin Longchamp4bf3a562014-10-14 11:16:33 +0200392#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
393 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
wdenk38635852002-08-27 05:55:31 +0000394#endif
395}
Heiko Schocher548738b2010-01-07 08:55:40 +0100396
wdenk38635852002-08-27 05:55:31 +0000397/*-----------------------------------------------------------------------
398 */
Jon Loeliger90253172007-07-10 11:02:44 -0500399
wdenk8bde7f72003-06-27 21:31:46 +0000400/***************************************************/
401
Jon Loeligerbaa26db2007-07-08 17:51:39 -0500402#if defined(CONFIG_CMD_EEPROM)
wdenk8bde7f72003-06-27 21:31:46 +0000403
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200404#ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
wdenk0d498392003-07-01 21:06:45 +0000405U_BOOT_CMD(
406 eeprom, 6, 1, do_eeprom,
Peter Tyser2fb26042009-01-27 18:03:12 -0600407 "EEPROM sub-system",
wdenk8bde7f72003-06-27 21:31:46 +0000408 "read devaddr addr off cnt\n"
409 "eeprom write devaddr addr off cnt\n"
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200410 " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
Jeroen Hofstee0e350f82014-06-23 00:22:08 +0200411)
wdenk8bde7f72003-06-27 21:31:46 +0000412#else /* One EEPROM */
wdenk0d498392003-07-01 21:06:45 +0000413U_BOOT_CMD(
414 eeprom, 5, 1, do_eeprom,
Peter Tyser2fb26042009-01-27 18:03:12 -0600415 "EEPROM sub-system",
wdenk8bde7f72003-06-27 21:31:46 +0000416 "read addr off cnt\n"
417 "eeprom write addr off cnt\n"
Wolfgang Denka89c33d2009-05-24 17:06:54 +0200418 " - read/write `cnt' bytes at EEPROM offset `off'"
Jeroen Hofstee0e350f82014-06-23 00:22:08 +0200419)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200420#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
wdenk8bde7f72003-06-27 21:31:46 +0000421
Jon Loeliger90253172007-07-10 11:02:44 -0500422#endif